35   const R600InstrInfo *TII;  member in __anonbccc35610111::R600ExpandSpecialInstrsPass
42     TII(nullptr) { }  in R600ExpandSpecialInstrsPass()
61   int OpIdx = TII->getOperandIdx(*OldMI, Op);  in SetFlagInNewMI()
64     TII->setImmOperand(NewMI, Op, Val);  in SetFlagInNewMI()
69   TII = static_cast<const R600InstrInfo *>(MF.getSubtarget().getInstrInfo());  in runOnMachineFunction()
71   const R600RegisterInfo &TRI = TII->getRegisterInfo();  in runOnMachineFunction()
82       if (TII->isLDSRetInstr(MI.getOpcode())) {  in runOnMachineFunction()
83         int DstIdx = TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::dst);  in runOnMachineFunction()
86         MachineInstr *Mov = TII->buildMovInstr(&MBB, I,  in runOnMachineFunction()
89         int LDSPredSelIdx = TII->getOperandIdx(MI.getOpcode(),  in runOnMachineFunction()
91         int MovPredSelIdx = TII->getOperandIdx(Mov->getOpcode(),  in runOnMachineFunction()
105         MachineInstr *PredSet = TII->buildDefaultInstruction(MBB, I,  in runOnMachineFunction()
110         TII->addFlag(PredSet, 0, MO_FLAG_MASK);  in runOnMachineFunction()
112           TII->setImmOperand(PredSet, AMDGPU::OpName::update_exec_mask, 1);  in runOnMachineFunction()
114           TII->setImmOperand(PredSet, AMDGPU::OpName::update_pred, 1);  in runOnMachineFunction()
133           BMI = TII->buildDefaultInstruction(MBB, I, AMDGPU::INTERP_XY,  in runOnMachineFunction()
140             TII->addFlag(BMI, 0, MO_FLAG_MASK);  in runOnMachineFunction()
142             TII->addFlag(BMI, 0, MO_FLAG_NOT_LAST);  in runOnMachineFunction()
162           BMI = TII->buildDefaultInstruction(MBB, I, AMDGPU::INTERP_ZW,  in runOnMachineFunction()
169             TII->addFlag(BMI, 0, MO_FLAG_MASK);  in runOnMachineFunction()
171             TII->addFlag(BMI, 0, MO_FLAG_NOT_LAST);  in runOnMachineFunction()
179         const R600RegisterInfo &TRI = TII->getRegisterInfo();  in runOnMachineFunction()
186           BMI = TII->buildDefaultInstruction(MBB, I, AMDGPU::INTERP_LOAD_P0,  in runOnMachineFunction()
192             TII->addFlag(BMI, 0, MO_FLAG_NOT_LAST);  in runOnMachineFunction()
200         const R600RegisterInfo &TRI = TII->getRegisterInfo();  in runOnMachineFunction()
210               TII->buildSlotOfVectorInstruction(MBB, &MI, Chan, SubDstReg);  in runOnMachineFunction()
215             TII->addFlag(BMI, 0, MO_FLAG_MASK);  in runOnMachineFunction()
218             TII->addFlag(BMI, 0, MO_FLAG_NOT_LAST);  in runOnMachineFunction()
223               TII->getOperandIdx(Opcode, AMDGPU::OpName::src0))  in runOnMachineFunction()
226               TII->getOperandIdx(Opcode, AMDGPU::OpName::src1))  in runOnMachineFunction()
239       bool IsReduction = TII->isReductionOp(MI.getOpcode());  in runOnMachineFunction()
240       bool IsVector = TII->isVector(MI);  in runOnMachineFunction()
241       bool IsCube = TII->isCubeOp(MI.getOpcode());  in runOnMachineFunction()
273                             TII->getOperandIdx(MI, AMDGPU::OpName::dst)).getReg();  in runOnMachineFunction()
275                            TII->getOperandIdx(MI, AMDGPU::OpName::src0)).getReg();  in runOnMachineFunction()
280           int Src1Idx = TII->getOperandIdx(MI, AMDGPU::OpName::src1);  in runOnMachineFunction()
328           TII->buildDefaultInstruction(MBB, I, Opcode, DstReg, Src0, Src1);  in runOnMachineFunction()
333           TII->addFlag(NewMI, 0, MO_FLAG_MASK);  in runOnMachineFunction()
336           TII->addFlag(NewMI, 0, MO_FLAG_NOT_LAST);  in runOnMachineFunction()