29   BitVector Reserved(getNumRegs());  in getReservedRegs()  local
34   Reserved.set(AMDGPU::ZERO);  in getReservedRegs()
35   Reserved.set(AMDGPU::HALF);  in getReservedRegs()
36   Reserved.set(AMDGPU::ONE);  in getReservedRegs()
37   Reserved.set(AMDGPU::ONE_INT);  in getReservedRegs()
38   Reserved.set(AMDGPU::NEG_HALF);  in getReservedRegs()
39   Reserved.set(AMDGPU::NEG_ONE);  in getReservedRegs()
40   Reserved.set(AMDGPU::PV_X);  in getReservedRegs()
41   Reserved.set(AMDGPU::ALU_LITERAL_X);  in getReservedRegs()
42   Reserved.set(AMDGPU::ALU_CONST);  in getReservedRegs()
43   Reserved.set(AMDGPU::PREDICATE_BIT);  in getReservedRegs()
44   Reserved.set(AMDGPU::PRED_SEL_OFF);  in getReservedRegs()
45   Reserved.set(AMDGPU::PRED_SEL_ZERO);  in getReservedRegs()
46   Reserved.set(AMDGPU::PRED_SEL_ONE);  in getReservedRegs()
47   Reserved.set(AMDGPU::INDIRECT_BASE_ADDR);  in getReservedRegs()
51     Reserved.set(*I);  in getReservedRegs()
54   TII->reserveIndirectRegisters(Reserved, MF);  in getReservedRegs()
56   return Reserved;  in getReservedRegs()