Lines Matching refs:ResultReg
2633 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarAbs() local
2639 BuildMI(MBB, MII, DL, get(AMDGPU::V_MAX_I32_e64), ResultReg) in lowerScalarAbs()
2643 MRI.replaceRegWith(Dest.getReg(), ResultReg); in lowerScalarAbs()
2644 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in lowerScalarAbs()
2786 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBCNT() local
2799 BuildMI(MBB, MII, DL, InstDesc, ResultReg) in splitScalar64BitBCNT()
2803 MRI.replaceRegWith(Dest.getReg(), ResultReg); in splitScalar64BitBCNT()
2807 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in splitScalar64BitBCNT()
2833 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local
2844 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), ResultReg) in splitScalar64BitBFE()
2850 MRI.replaceRegWith(Dest.getReg(), ResultReg); in splitScalar64BitBFE()
2851 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in splitScalar64BitBFE()
2857 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local
2863 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), ResultReg) in splitScalar64BitBFE()
2869 MRI.replaceRegWith(Dest.getReg(), ResultReg); in splitScalar64BitBFE()
2870 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in splitScalar64BitBFE()