1693   const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(RC);  in legalizeOpWithMove()  local
1694   if (RI.getCommonSubClass(&AMDGPU::VReg_64RegClass, VRC))  in legalizeOpWithMove()
1695     VRC = &AMDGPU::VReg_64RegClass;  in legalizeOpWithMove()
1697     VRC = &AMDGPU::VGPR_32RegClass;  in legalizeOpWithMove()
1699   unsigned Reg = MRI.createVirtualRegister(VRC);  in legalizeOpWithMove()
1982     const TargetRegisterClass *RC = nullptr, *SRC = nullptr, *VRC = nullptr;  in legalizeOperands()  local
1990         VRC = OpRC;  in legalizeOperands()
1999     if (VRC || !RI.isSGPRClass(getOpRegClass(*MI, 0))) {  in legalizeOperands()
2000       if (!VRC) {  in legalizeOperands()
2002         VRC = RI.getEquivalentVGPRClass(SRC);  in legalizeOperands()
2004       RC = VRC;  in legalizeOperands()
2042         const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(OpRC);  in legalizeOperands()  local
2043         if (VRC == OpRC)  in legalizeOperands()
2046         unsigned DstReg = MRI.createVirtualRegister(VRC);  in legalizeOperands()