44   void lowerScalarAbs(SmallVectorImpl<MachineInstr *> &Worklist,
45                       MachineInstr *Inst) const;
47   void splitScalar64BitUnaryOp(SmallVectorImpl<MachineInstr *> &Worklist,
48                                MachineInstr *Inst, unsigned Opcode) const;
50   void splitScalar64BitBinaryOp(SmallVectorImpl<MachineInstr *> &Worklist,
51                                 MachineInstr *Inst, unsigned Opcode) const;
53   void splitScalar64BitBCNT(SmallVectorImpl<MachineInstr *> &Worklist,
54                             MachineInstr *Inst) const;
55   void splitScalar64BitBFE(SmallVectorImpl<MachineInstr *> &Worklist,
56                            MachineInstr *Inst) const;
60     SmallVectorImpl<MachineInstr *> &Worklist) const;
63   getDestEquivalentVGPRClass(const MachineInstr &Inst) const;
65   bool checkInstOffsetsDoNotOverlap(MachineInstr *MIa,
66                                     MachineInstr *MIb) const;
68   unsigned findUsedSGPR(const MachineInstr *MI, int OpIndices[3]) const;
71   MachineInstr *commuteInstructionImpl(MachineInstr *MI,
83   bool isReallyTriviallyReMaterializable(const MachineInstr *MI,
90   bool getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg,
94   bool shouldClusterLoads(MachineInstr *FirstLdSt,
95                           MachineInstr *SecondLdSt,
130   int commuteOpcode(const MachineInstr &MI) const;
132   bool findCommutedOpIndices(MachineInstr *MI,
137     MachineInstr *MIa, MachineInstr *MIb,
140   MachineInstr *buildMovInstr(MachineBasicBlock *MBB,
145   bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
150   MachineInstr *convertToThreeAddress(MachineFunction::iterator &MBB,
154   static bool isSALU(const MachineInstr &MI) {  in isSALU()
162   static bool isVALU(const MachineInstr &MI) {  in isVALU()
170   static bool isSOP1(const MachineInstr &MI) {  in isSOP1()
178   static bool isSOP2(const MachineInstr &MI) {  in isSOP2()
186   static bool isSOPC(const MachineInstr &MI) {  in isSOPC()
194   static bool isSOPK(const MachineInstr &MI) {  in isSOPK()
202   static bool isSOPP(const MachineInstr &MI) {  in isSOPP()
210   static bool isVOP1(const MachineInstr &MI) {  in isVOP1()
218   static bool isVOP2(const MachineInstr &MI) {  in isVOP2()
226   static bool isVOP3(const MachineInstr &MI) {  in isVOP3()
234   static bool isVOPC(const MachineInstr &MI) {  in isVOPC()
242   static bool isMUBUF(const MachineInstr &MI) {  in isMUBUF()
250   static bool isMTBUF(const MachineInstr &MI) {  in isMTBUF()
258   static bool isSMRD(const MachineInstr &MI) {  in isSMRD()
266   static bool isDS(const MachineInstr &MI) {  in isDS()
274   static bool isMIMG(const MachineInstr &MI) {  in isMIMG()
282   static bool isFLAT(const MachineInstr &MI) {  in isFLAT()
290   static bool isWQM(const MachineInstr &MI) {  in isWQM()
298   static bool isVGPRSpill(const MachineInstr &MI) {  in isVGPRSpill()
310   bool isImmOperandLegal(const MachineInstr *MI, unsigned OpNo,
326   bool hasModifiersSet(const MachineInstr &MI,
329   bool verifyInstruction(const MachineInstr *MI,
332   static unsigned getVALUOp(const MachineInstr &MI);
334   bool isSALUOpSupportedOnVALU(const MachineInstr &MI) const;
341   const TargetRegisterClass *getOpRegClass(const MachineInstr &MI,
360   unsigned getOpSize(const MachineInstr &MI, unsigned OpNo) const {  in getOpSize()
366   bool canReadVGPR(const MachineInstr &MI, unsigned OpNo) const;
377   void legalizeOpWithMove(MachineInstr *MI, unsigned OpIdx) const;
381   bool isOperandLegal(const MachineInstr *MI, unsigned OpIdx,
399   void legalizeOperandsVOP2(MachineRegisterInfo &MRI, MachineInstr *MI) const;
402   void legalizeOperandsVOP3(MachineRegisterInfo &MRI, MachineInstr *MI) const;
406   void legalizeOperands(MachineInstr *MI) const;
410   void splitSMRD(MachineInstr *MI, const TargetRegisterClass *HalfRC,
412                  MachineInstr *&Lo, MachineInstr *&Hi) const;
414   void moveSMRDToVALU(MachineInstr *MI, MachineRegisterInfo &MRI,
415                       SmallVectorImpl<MachineInstr *> &Worklist) const;
420   void moveToVALU(MachineInstr &MI) const;
441   void LoadM0(MachineInstr *MoveRel, MachineBasicBlock::iterator I,
449   MachineOperand *getNamedOperand(MachineInstr &MI, unsigned OperandName) const;
452   const MachineOperand *getNamedOperand(const MachineInstr &MI,  in getNamedOperand()
454     return getNamedOperand(const_cast<MachineInstr &>(MI), OpName);  in getNamedOperand()
458   int64_t getNamedImmOperand(const MachineInstr &MI, unsigned OpName) const {  in getNamedImmOperand()