Lines Matching refs:TmpInst
1377 MCInst TmpInst; in EmitInstruction() local
1378 TmpInst.setOpcode(Opc == ARM::MOVi16_ga_pcrel? ARM::MOVi16 : ARM::t2MOVi16); in EmitInstruction()
1379 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in EmitInstruction()
1396 TmpInst.addOperand(MCOperand::createExpr(PCRelExpr)); in EmitInstruction()
1399 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in EmitInstruction()
1400 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1402 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1403 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
1408 MCInst TmpInst; in EmitInstruction() local
1409 TmpInst.setOpcode(Opc == ARM::MOVTi16_ga_pcrel in EmitInstruction()
1411 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in EmitInstruction()
1412 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(1).getReg())); in EmitInstruction()
1429 TmpInst.addOperand(MCOperand::createExpr(PCRelExpr)); in EmitInstruction()
1431 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in EmitInstruction()
1432 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1434 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1435 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
1587 MCInst TmpInst; in EmitInstruction() local
1590 TmpInst.setOpcode(Opc); in EmitInstruction()
1591 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in EmitInstruction()
1592 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in EmitInstruction()
1594 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in EmitInstruction()
1595 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1598 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1599 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
1605 MCInst TmpInst; in EmitInstruction() local
1608 TmpInst.setOpcode(ARM::LDRi12); in EmitInstruction()
1609 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in EmitInstruction()
1610 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in EmitInstruction()
1611 TmpInst.addOperand(MCOperand::createImm(MI->getOperand(2).getImm())); in EmitInstruction()
1613 TmpInst.setOpcode(ARM::LDRrs); in EmitInstruction()
1614 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in EmitInstruction()
1615 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in EmitInstruction()
1616 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(1).getReg())); in EmitInstruction()
1617 TmpInst.addOperand(MCOperand::createImm(0)); in EmitInstruction()
1620 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in EmitInstruction()
1621 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1622 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
1890 MCInst TmpInst; in EmitInstruction() local
1891 LowerARMMachineInstrToMCInst(MI, TmpInst, *this); in EmitInstruction()
1893 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()