Lines Matching refs:AddDefaultPred

675   AddDefaultPred(MIB);  in copyFromCPSR()
697 AddDefaultPred(MIB); in copyToCPSR()
710 AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::MOVr), DestReg) in copyPhysReg()
735 AddDefaultPred(MIB); in copyPhysReg()
822 Mov = AddDefaultPred(Mov); in copyPhysReg()
863 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::STRi12)) in storeRegToStackSlot()
867 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTRS)) in storeRegToStackSlot()
875 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTRD)) in storeRegToStackSlot()
885 AddDefaultPred(MIB); in storeRegToStackSlot()
890 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::STMIA)) in storeRegToStackSlot()
902 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VST1q64)) in storeRegToStackSlot()
907 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMQIA)) in storeRegToStackSlot()
919 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VST1d64TPseudo)) in storeRegToStackSlot()
925 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMDIA)) in storeRegToStackSlot()
940 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VST1d64QPseudo)) in storeRegToStackSlot()
946 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMDIA)) in storeRegToStackSlot()
960 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMDIA)) in storeRegToStackSlot()
1051 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::LDRi12), DestReg) in loadRegFromStackSlot()
1055 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDRS), DestReg) in loadRegFromStackSlot()
1062 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDRD), DestReg) in loadRegFromStackSlot()
1073 AddDefaultPred(MIB); in loadRegFromStackSlot()
1077 MIB = AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::LDMIA)) in loadRegFromStackSlot()
1091 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLD1q64), DestReg) in loadRegFromStackSlot()
1095 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMQIA), DestReg) in loadRegFromStackSlot()
1105 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLD1d64TPseudo), DestReg) in loadRegFromStackSlot()
1110 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMDIA)) in loadRegFromStackSlot()
1125 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLD1d64QPseudo), DestReg) in loadRegFromStackSlot()
1130 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMDIA)) in loadRegFromStackSlot()
1146 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMDIA)) in loadRegFromStackSlot()
1252 AddDefaultPred(LDM.addOperand(MI->getOperand(3))); in expandMEMCPY()
1253 AddDefaultPred(STM.addOperand(MI->getOperand(2))); in expandMEMCPY()
1341 AddDefaultPred(MIB); in expandPostRAPseudo()
2739 AddDefaultCC(AddDefaultPred(BuildMI(*UseMI->getParent(), in FoldImmediate()
4104 AddDefaultPred(MIB); in expandLoadStackGuardBase()
4110 AddDefaultPred(MIB); in expandLoadStackGuardBase()
4269 AddDefaultPred(MIB.addReg(DstReg, RegState::Define) in setExecutionDomain()
4291 AddDefaultPred(MIB.addReg(DstReg, RegState::Define) in setExecutionDomain()
4324 AddDefaultPred(MIB); in setExecutionDomain()
4359 AddDefaultPred(MIB); in setExecutionDomain()
4398 AddDefaultPred(NewMIB); in setExecutionDomain()
4417 AddDefaultPred(MIB); in setExecutionDomain()
4541 AddDefaultPred(BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), in breakPartialRegDependency()