Lines Matching refs:UseMI
2636 bool ARMBaseInstrInfo::FoldImmediate(MachineInstr *UseMI, in FoldImmediate() argument
2660 const MCInstrDesc &UseMCID = UseMI->getDesc(); in FoldImmediate()
2663 if (UseMI->getOperand(NumOps-1).getReg() == ARM::CPSR) in FoldImmediate()
2669 unsigned UseOpc = UseMI->getOpcode(); in FoldImmediate()
2684 Commute = UseMI->getOperand(2).getReg() != Reg; in FoldImmediate()
2736 unsigned Reg1 = UseMI->getOperand(OpIdx).getReg(); in FoldImmediate()
2737 bool isKill = UseMI->getOperand(OpIdx).isKill(); in FoldImmediate()
2739 AddDefaultCC(AddDefaultPred(BuildMI(*UseMI->getParent(), in FoldImmediate()
2740 UseMI, UseMI->getDebugLoc(), in FoldImmediate()
2744 UseMI->setDesc(get(NewUseOpc)); in FoldImmediate()
2745 UseMI->getOperand(1).setReg(NewReg); in FoldImmediate()
2746 UseMI->getOperand(1).setIsKill(); in FoldImmediate()
2747 UseMI->getOperand(2).ChangeToImmediate(SOImmValV2); in FoldImmediate()
3645 const MachineInstr *UseMI, in getOperandLatency() argument
3654 const MCInstrDesc *UseMCID = &UseMI->getDesc(); in getOperandLatency()
3667 if (UseMI->isBundle()) { in getOperandLatency()
3669 const MachineInstr *NewUseMI = getBundledUseMI(&getRegisterInfo(), UseMI, in getOperandLatency()
3674 UseMI = NewUseMI; in getOperandLatency()
3676 UseMCID = &UseMI->getDesc(); in getOperandLatency()
3686 if (UseMI->isBranch()) in getOperandLatency()
3705 if (DefMO.isImplicit() || UseMI->getOperand(UseIdx).isImplicit()) in getOperandLatency()
3710 unsigned UseAlign = UseMI->hasOneMemOperand() in getOperandLatency()
3711 ? (*UseMI->memoperands_begin())->getAlignment() : 0; in getOperandLatency()
4039 const MachineInstr *UseMI, unsigned UseIdx) const { in hasHighOperandLatency() argument
4041 unsigned UDomain = UseMI->getDesc().TSFlags & ARMII::DomainMask; in hasHighOperandLatency()
4049 = SchedModel.computeOperandLatency(DefMI, DefIdx, UseMI, UseIdx); in hasHighOperandLatency()