181     unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1746   EVT DestVT = TLI.getValueType(DL, I->getType(), true);  in SelectBinaryIntOp()  local
1750   if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)  in SelectBinaryIntOp()
1955         MVT DestVT = VA.getLocVT();  in ProcessCallArgs()  local
1956         Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false);  in ProcessCallArgs()
1958         ArgVT = DestVT;  in ProcessCallArgs()
1964         MVT DestVT = VA.getLocVT();  in ProcessCallArgs()  local
1965         Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true);  in ProcessCallArgs()
1967         ArgVT = DestVT;  in ProcessCallArgs()
2042       MVT DestVT = RVLocs[0].getValVT();  in FinishCall()  local
2043       const TargetRegisterClass* DstRC = TLI.getRegClassFor(DestVT);  in FinishCall()
2122     MVT DestVT = VA.getValVT();  in SelectRet()  local
2124     if (RVVT != DestVT) {  in SelectRet()
2128       assert(DestVT == MVT::i32 && "ARM should always ext to i32");  in SelectRet()
2133         SrcReg = ARMEmitIntExt(RVVT, SrcReg, DestVT, Outs[0].Flags.isZExt());  in SelectRet()
2572   EVT SrcVT, DestVT;  in SelectTrunc()  local
2574   DestVT = TLI.getValueType(DL, I->getType(), true);  in SelectTrunc()
2578   if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)  in SelectTrunc()
2590 unsigned ARMFastISel::ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,  in ARMEmitIntExt()  argument
2592   if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8)  in ARMEmitIntExt()
2664   unsigned DestBits = DestVT.getSizeInBits();  in ARMEmitIntExt()
2745   MVT DestVT = DestEVT.getSimpleVT();  in SelectIntExt()  local
2746   unsigned ResultReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT, isZExt);  in SelectIntExt()
2760   EVT DestVT = TLI.getValueType(DL, I->getType(), true);  in SelectShift()  local
2761   if (DestVT != MVT::i32)  in SelectShift()