6985     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2LDRpci), NewVReg1)  in SetupEntryBlockForSjLj()
6991       AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2ORRri), NewVReg2)  in SetupEntryBlockForSjLj()
6998     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2STRi12))  in SetupEntryBlockForSjLj()
7012     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tLDRpci), NewVReg1)  in SetupEntryBlockForSjLj()
7021     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tMOVi8), NewVReg3)  in SetupEntryBlockForSjLj()
7025     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tORR), NewVReg4)  in SetupEntryBlockForSjLj()
7033     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tSTRi))  in SetupEntryBlockForSjLj()
7044     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::LDRi12),  NewVReg1)  in SetupEntryBlockForSjLj()
7049     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::PICADD), NewVReg2)  in SetupEntryBlockForSjLj()
7052     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::STRi12))  in SetupEntryBlockForSjLj()
7168     AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1)  in EmitSjLjDispatchBlock()
7174       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPri))  in EmitSjLjDispatchBlock()
7179       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVi16), VReg1)  in EmitSjLjDispatchBlock()
7185         AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVTi16), VReg2)  in EmitSjLjDispatchBlock()
7190       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPrr))  in EmitSjLjDispatchBlock()
7201     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT),NewVReg3)  in EmitSjLjDispatchBlock()
7206       AddDefaultPred(  in EmitSjLjDispatchBlock()
7218     AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRspi), NewVReg1)  in EmitSjLjDispatchBlock()
7224       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPi8))  in EmitSjLjDispatchBlock()
7239       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRpci))  in EmitSjLjDispatchBlock()
7242       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPr))  in EmitSjLjDispatchBlock()
7253     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLSLri), NewVReg2)  in EmitSjLjDispatchBlock()
7259     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLEApcrelJT), NewVReg3)  in EmitSjLjDispatchBlock()
7263     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg4)  in EmitSjLjDispatchBlock()
7272     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5)  in EmitSjLjDispatchBlock()
7280       AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg6)  in EmitSjLjDispatchBlock()
7291     AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRi12), NewVReg1)  in EmitSjLjDispatchBlock()
7297       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPri))  in EmitSjLjDispatchBlock()
7302       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1)  in EmitSjLjDispatchBlock()
7308         AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVTi16), VReg2)  in EmitSjLjDispatchBlock()
7313       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr))  in EmitSjLjDispatchBlock()
7328       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRcp))  in EmitSjLjDispatchBlock()
7332       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr))  in EmitSjLjDispatchBlock()
7344       AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::MOVsi), NewVReg3)  in EmitSjLjDispatchBlock()
7348     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::LEApcrelJT), NewVReg4)  in EmitSjLjDispatchBlock()
7354     AddDefaultPred(  in EmitSjLjDispatchBlock()
7504     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data)  in emitPostLd()
7509     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data)  in emitPostLd()
7515     AddDefaultPred(MIB);  in emitPostLd()
7517     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data)  in emitPostLd()
7521     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data)  in emitPostLd()
7536     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut)  in emitPostSt()
7540     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc)).addReg(Data)  in emitPostSt()
7546     AddDefaultPred(MIB);  in emitPostSt()
7548     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut)  in emitPostSt()
7551     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut)  in emitPostSt()
7683     AddDefaultPred(BuildMI(BB, dl,  in EmitStructByval()
7688       AddDefaultPred(BuildMI(BB, dl,  in EmitStructByval()
7705       AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(ARM::tLDRpci)).addReg(  in EmitStructByval()
7708       AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(ARM::LDRcp)).addReg(  in EmitStructByval()
7750     AddDefaultPred(MIB);  in EmitStructByval()
7755     AddDefaultCC(AddDefaultPred(MIB.addReg(varPhi).addImm(UnitSize)));  in EmitStructByval()
7849   AddDefaultCC(AddDefaultPred(BuildMI(*MBB, MI, DL, TII.get(ARM::t2SUBrr),  in EmitLowered__chkstk()
8012       AddDefaultPred(BuildMI(BB, dl,  in EmitInstrWithCustomInserter()
8021       AddDefaultPred(BuildMI(BB, dl,  in EmitInstrWithCustomInserter()
8037       AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2B)).addMBB(exitMBB));  in EmitInstrWithCustomInserter()
8100     AddDefaultPred(BuildMI(BB, dl,  in EmitInstrWithCustomInserter()