3435   SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);  in LowerXALUO()
3466     SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);  in LowerSELECT()
3637     SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);  in LowerSELECT_CC()
3663   SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);  in LowerSELECT_CC()
3775       SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);  in OptimizeVFPBrcond()
3819     SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);  in LowerBR_CC()
3839   SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);  in LowerBR_CC()
4277   SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);  in LowerShiftRightParts()
4311   SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);  in LowerShiftLeftParts()
7022                    .addReg(ARM::CPSR, RegState::Define)  in SetupEntryBlockForSjLj()
7026                    .addReg(ARM::CPSR, RegState::Define)  in SetupEntryBlockForSjLj()
7198       .addReg(ARM::CPSR);  in EmitSjLjDispatchBlock()
7250       .addReg(ARM::CPSR);  in EmitSjLjDispatchBlock()
7254                    .addReg(ARM::CPSR, RegState::Define)  in EmitSjLjDispatchBlock()
7264                    .addReg(ARM::CPSR, RegState::Define)  in EmitSjLjDispatchBlock()
7281                      .addReg(ARM::CPSR, RegState::Define)  in EmitSjLjDispatchBlock()
7340       .addReg(ARM::CPSR);  in EmitSjLjDispatchBlock()
7756     MIB->getOperand(5).setReg(ARM::CPSR);  in EmitStructByval()
7761       .addMBB(loopMBB).addImm(ARMCC::NE).addReg(ARM::CPSR);  in EmitStructByval()
8017         .addImm(ARMCC::EQ).addReg(ARM::CPSR);  in EmitInstrWithCustomInserter()
8026         .addImm(ARMCC::EQ).addReg(ARM::CPSR);  in EmitInstrWithCustomInserter()
8035       .addMBB(destMBB).addImm(ARMCC::EQ).addReg(ARM::CPSR);  in EmitInstrWithCustomInserter()
8107       .addImm(ARMCC::getOppositeCondition(ARMCC::MI)).addReg(ARM::CPSR);  in EmitInstrWithCustomInserter()
8212     if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) {  in AdjustInstrPostInstrSelection()
8234   MO.setReg(ARM::CPSR);  in AdjustInstrPostInstrSelection()
11349     return std::make_pair(unsigned(ARM::CPSR), &ARM::CCRRegClass);  in getRegForInlineAsmConstraint()