Lines Matching refs:DispatchBB

6947                        MachineBasicBlock *DispatchBB, int FI) const {  in SetupEntryBlockForSjLj()  argument
6962 ARMConstantPoolMBB::Create(F->getContext(), DispatchBB, PCLabelId, PCAdj); in SetupEntryBlockForSjLj()
7126 MachineBasicBlock *DispatchBB = MF->CreateMachineBasicBlock(); in EmitSjLjDispatchBlock() local
7127 DispatchBB->setIsEHPad(); in EmitSjLjDispatchBlock()
7137 DispatchBB->addSuccessor(TrapBB); in EmitSjLjDispatchBlock()
7140 DispatchBB->addSuccessor(DispContBB); in EmitSjLjDispatchBlock()
7143 MF->insert(MF->end(), DispatchBB); in EmitSjLjDispatchBlock()
7149 SetupEntryBlockForSjLj(MI, MBB, DispatchBB, FI); in EmitSjLjDispatchBlock()
7156 MIB = BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup)); in EmitSjLjDispatchBlock()
7168 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1) in EmitSjLjDispatchBlock()
7174 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPri)) in EmitSjLjDispatchBlock()
7179 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVi16), VReg1) in EmitSjLjDispatchBlock()
7185 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVTi16), VReg2) in EmitSjLjDispatchBlock()
7190 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPrr)) in EmitSjLjDispatchBlock()
7195 BuildMI(DispatchBB, dl, TII->get(ARM::t2Bcc)) in EmitSjLjDispatchBlock()
7218 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRspi), NewVReg1) in EmitSjLjDispatchBlock()
7224 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPi8)) in EmitSjLjDispatchBlock()
7239 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRpci)) in EmitSjLjDispatchBlock()
7242 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPr)) in EmitSjLjDispatchBlock()
7247 BuildMI(DispatchBB, dl, TII->get(ARM::tBcc)) in EmitSjLjDispatchBlock()
7291 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRi12), NewVReg1) in EmitSjLjDispatchBlock()
7297 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPri)) in EmitSjLjDispatchBlock()
7302 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1) in EmitSjLjDispatchBlock()
7308 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVTi16), VReg2) in EmitSjLjDispatchBlock()
7313 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr)) in EmitSjLjDispatchBlock()
7328 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRcp)) in EmitSjLjDispatchBlock()
7332 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr)) in EmitSjLjDispatchBlock()
7337 BuildMI(DispatchBB, dl, TII->get(ARM::Bcc)) in EmitSjLjDispatchBlock()
7399 BB->addSuccessor(DispatchBB, BranchProbability::getZero()); in EmitSjLjDispatchBlock()