Lines Matching refs:SDValue
234 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
239 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
260 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const;
261 SDValue PerformCMOVToBFICombine(SDNode *N, SelectionDAG &DAG) const;
262 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
280 bool isZExtFree(SDValue Val, EVT VT2) const override;
282 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
308 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset,
315 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base,
316 SDValue &Offset, ISD::MemIndexedMode &AM,
319 void computeKnownBitsForTargetNode(const SDValue Op, APInt &KnownZero,
342 void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint,
343 std::vector<SDValue> &Ops,
492 std::pair<SDValue, SDValue> getARMXALUOOp(SDValue Op, SelectionDAG &DAG, SDValue &ARMcc) const;
494 typedef SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPassVector;
496 SDValue Chain, SDValue &Arg,
499 SDValue &StackPtr,
500 SmallVectorImpl<SDValue> &MemOpChains,
502 SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA,
503 SDValue &Root, SelectionDAG &DAG,
510 SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg,
514 SDValue LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const;
515 SDValue LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const;
516 SDValue LowerEH_SJLJ_SETUP_DISPATCH(SDValue Op, SelectionDAG &DAG) const;
517 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG,
519 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
520 SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG) const;
521 SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG) const;
522 SDValue LowerGlobalAddressWindows(SDValue Op, SelectionDAG &DAG) const;
523 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
524 SDValue LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA,
526 SDValue LowerToTLSExecModels(GlobalAddressSDNode *GA,
529 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
530 SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) const;
531 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
532 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
533 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
534 SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const;
535 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
536 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
537 SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const;
538 SDValue LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const;
539 SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const;
540 SDValue LowerConstantFP(SDValue Op, SelectionDAG &DAG,
542 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
544 SDValue LowerFSINCOS(SDValue Op, SelectionDAG &DAG) const;
545 SDValue LowerDivRem(SDValue Op, SelectionDAG &DAG) const;
546 SDValue LowerDIV_Windows(SDValue Op, SelectionDAG &DAG, bool Signed) const;
547 void ExpandDIV_Windows(SDValue Op, SelectionDAG &DAG, bool Signed,
548 SmallVectorImpl<SDValue> &Results) const;
549 SDValue LowerWindowsDIVLibCall(SDValue Op, SelectionDAG &DAG, bool Signed,
550 SDValue &Chain) const;
551 SDValue LowerREM(SDNode *N, SelectionDAG &DAG) const;
552 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
553 SDValue LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const;
554 SDValue LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const;
555 SDValue LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const;
556 SDValue LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG) const;
572 SDValue ReconstructShuffle(SDValue Op, SelectionDAG &DAG) const;
574 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
578 SmallVectorImpl<SDValue> &InVals,
579 bool isThisReturn, SDValue ThisVal) const;
581 SDValue
582 LowerFormalArguments(SDValue Chain,
586 SmallVectorImpl<SDValue> &InVals) const override;
589 SDLoc dl, SDValue &Chain,
596 SDLoc dl, SDValue &Chain,
601 SDValue
603 SmallVectorImpl<SDValue> &InVals) const override;
611 bool IsEligibleForTailCallOptimization(SDValue Callee,
617 const SmallVectorImpl<SDValue> &OutVals,
626 SDValue
627 LowerReturn(SDValue Chain,
630 const SmallVectorImpl<SDValue> &OutVals,
633 bool isUsedByReturnOnly(SDNode *N, SDValue &Chain) const override;
637 SDValue getCMOV(SDLoc dl, EVT VT, SDValue FalseVal, SDValue TrueVal,
638 SDValue ARMcc, SDValue CCR, SDValue Cmp,
640 SDValue getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
641 SDValue &ARMcc, SelectionDAG &DAG, SDLoc dl) const;
642 SDValue getVFPCmp(SDValue LHS, SDValue RHS,
644 SDValue duplicateCmp(SDValue Cmp, SelectionDAG &DAG) const;
646 SDValue OptimizeVFPBrcond(SDValue Op, SelectionDAG &DAG) const;