Lines Matching refs:cop
4788 def CDP : ABI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
4790 NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
4791 [(int_arm_cdp imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,
4797 bits<4> cop;
4804 let Inst{11-8} = cop;
4810 def CDP2 : ABXI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
4812 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
4813 [(int_arm_cdp2 imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,
4820 bits<4> cop;
4827 let Inst{11-8} = cop;
4847 def _OFFSET : ACI<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
4848 asm, "\t$cop, $CRd, $addr"> {
4850 bits<4> cop;
4859 let Inst{11-8} = cop;
4863 def _PRE : ACI<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5_pre:$addr),
4864 asm, "\t$cop, $CRd, $addr!", IndexModePre> {
4866 bits<4> cop;
4875 let Inst{11-8} = cop;
4879 def _POST: ACI<(outs), (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4881 asm, "\t$cop, $CRd, $addr, $offset", IndexModePost> {
4884 bits<4> cop;
4893 let Inst{11-8} = cop;
4898 (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4900 asm, "\t$cop, $CRd, $addr, $option"> {
4903 bits<4> cop;
4912 let Inst{11-8} = cop;
4918 def _OFFSET : ACInoP<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
4919 asm, "\t$cop, $CRd, $addr"> {
4921 bits<4> cop;
4930 let Inst{11-8} = cop;
4934 def _PRE : ACInoP<(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5_pre:$addr),
4935 asm, "\t$cop, $CRd, $addr!", IndexModePre> {
4937 bits<4> cop;
4946 let Inst{11-8} = cop;
4950 def _POST: ACInoP<(outs), (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4952 asm, "\t$cop, $CRd, $addr, $offset", IndexModePost> {
4955 bits<4> cop;
4964 let Inst{11-8} = cop;
4969 (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4971 asm, "\t$cop, $CRd, $addr, $option"> {
4974 bits<4> cop;
4983 let Inst{11-8} = cop;
5005 "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2", pattern> {
5010 bits<4> cop;
5017 let Inst{11-8} = cop;
5026 (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5028 [(int_arm_mcr imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn,
5031 def : ARMInstAlias<"mcr${p} $cop, $opc1, $Rt, $CRn, $CRm",
5032 (MCR p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5036 (ins p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm,
5038 def : ARMInstAlias<"mrc${p} $cop, $opc1, $Rt, $CRn, $CRm",
5039 (MRC GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
5042 def : ARMPat<(int_arm_mrc imm:$cop, imm:$opc1, imm:$CRn, imm:$CRm, imm:$opc2),
5043 (MRC imm:$cop, imm:$opc1, imm:$CRn, imm:$CRm, imm:$opc2)>;
5048 !strconcat(opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2"), pattern> {
5054 bits<4> cop;
5061 let Inst{11-8} = cop;
5070 (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5072 [(int_arm_mcr2 imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn,
5075 def : ARMInstAlias<"mcr2 $cop, $opc1, $Rt, $CRn, $CRm",
5076 (MCR2 p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5080 (ins p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm,
5083 def : ARMInstAlias<"mrc2 $cop, $opc1, $Rt, $CRn, $CRm",
5084 (MRC2 GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
5087 def : ARMV5TPat<(int_arm_mrc2 imm:$cop, imm:$opc1, imm:$CRn,
5089 (MRC2 imm:$cop, imm:$opc1, imm:$CRn, imm:$CRm, imm:$opc2)>;
5093 : ABI<0b1100, oops, iops, NoItinerary, opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm",
5101 bits<4> cop;
5107 let Inst{11-8} = cop;
5113 (outs), (ins p_imm:$cop, imm0_15:$opc1, GPRnopc:$Rt,
5115 [(int_arm_mcrr imm:$cop, imm:$opc1, GPRnopc:$Rt,
5119 (ins p_imm:$cop, imm0_15:$opc1, c_imm:$CRm), []>;
5122 : ABXI<0b1100, (outs), (ins p_imm:$cop, imm0_15:$opc1,
5124 !strconcat(opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm"), pattern>,
5132 bits<4> cop;
5138 let Inst{11-8} = cop;
5146 [(int_arm_mcrr2 imm:$cop, imm:$opc1, GPRnopc:$Rt,