Lines Matching refs:Rd
298 bits<4> Rd;
301 let Inst{11-8} = Rd;
311 bits<4> Rd;
315 let Inst{11-8} = Rd;
337 bits<4> Rd;
340 let Inst{11-8} = Rd;
350 bits<4> Rd;
353 let Inst{11-8} = Rd;
376 bits<4> Rd;
379 let Inst{11-8} = Rd;
386 bits<4> Rd;
389 let Inst{11-8} = Rd;
407 bits<4> Rd;
411 let Inst{11-8} = Rd;
421 bits<4> Rd;
425 let Inst{11-8} = Rd;
435 bits<4> Rd;
439 let Inst{11-8} = Rd;
448 bits<4> Rd;
452 let Inst{11-8} = Rd;
461 bits<4> Rd;
465 let Inst{11-8} = Rd;
473 bits<4> Rd;
477 let Inst{11-8} = Rd;
485 bits<4> Rd;
489 let Inst{11-8} = Rd;
497 bits<4> Rd;
501 let Inst{11-8} = Rd;
512 bits<4> Rd;
516 let Inst{11-8} = Rd;
527 bits<4> Rd;
534 let Inst{11-8} = Rd;
583 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), iii,
584 opc, "\t$Rd, $Rn, $imm",
585 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_imm:$imm))]>,
593 def rr : T2sThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), iir,
594 opc, !strconcat(wide, "\t$Rd, $Rn, $Rm"),
595 [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]>,
607 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm), iis,
608 opc, !strconcat(wide, "\t$Rd, $Rn, $ShiftedRm"),
609 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_reg:$ShiftedRm))]>,
638 def : t2InstAlias<!strconcat(opc, "${s}${p}.w", " $Rd, $Rn, $imm"),
639 (!cast<Instruction>(NAME#"ri") rGPR:$Rd, rGPR:$Rn, t2_so_imm:$imm, pred:$p,
642 def : t2InstAlias<!strconcat(opc, "${s}${p}", " $Rd, $Rn, $Rm"),
643 (!cast<Instruction>(NAME#"rr") rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p,
645 def : t2InstAlias<!strconcat(opc, "${s}${p}", " $Rd, $Rn, $shift"),
646 (!cast<Instruction>(NAME#"rs") rGPR:$Rd, rGPR:$Rn, t2_so_reg:$shift,
667 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), IIC_iALUi,
668 opc, ".w\t$Rd, $Rn, $imm",
669 [(set rGPR:$Rd, (opnode t2_so_imm:$imm, rGPR:$Rn))]>,
678 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUr,
679 opc, "\t$Rd, $Rn, $Rm",
691 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm),
692 IIC_iALUsir, opc, "\t$Rd, $Rn, $ShiftedRm",
693 [(set rGPR:$Rd, (opnode t2_so_reg:$ShiftedRm, rGPR:$Rn))]>,
711 def ri : t2PseudoInst<(outs rGPR:$Rd),
714 [(set rGPR:$Rd, CPSR, (opnode GPRnopc:$Rn,
718 def rr : t2PseudoInst<(outs rGPR:$Rd), (ins GPRnopc:$Rn, rGPR:$Rm, pred:$p),
720 [(set rGPR:$Rd, CPSR, (opnode GPRnopc:$Rn,
726 def rs : t2PseudoInst<(outs rGPR:$Rd),
729 [(set rGPR:$Rd, CPSR, (opnode GPRnopc:$Rn,
740 def ri : t2PseudoInst<(outs rGPR:$Rd),
743 [(set rGPR:$Rd, CPSR, (opnode t2_so_imm:$imm,
747 def rs : t2PseudoInst<(outs rGPR:$Rd),
750 [(set rGPR:$Rd, CPSR, (opnode t2_so_reg:$ShiftedRm,
765 (outs GPRnopc:$Rd), (ins GPRnopc:$Rn, t2_so_imm:$imm), IIC_iALUi,
766 opc, ".w\t$Rd, $Rn, $imm",
767 [(set GPRnopc:$Rd, (opnode GPRnopc:$Rn, t2_so_imm:$imm))]>,
778 (outs GPRnopc:$Rd), (ins GPR:$Rn, imm0_4095:$imm), IIC_iALUi,
779 !strconcat(opc, "w"), "\t$Rd, $Rn, $imm",
780 [(set GPRnopc:$Rd, (opnode GPR:$Rn, imm0_4095:$imm))]>,
782 bits<4> Rd;
793 let Inst{11-8} = Rd;
797 def rr : T2sThreeReg<(outs GPRnopc:$Rd), (ins GPRnopc:$Rn, rGPR:$Rm),
798 IIC_iALUr, opc, ".w\t$Rd, $Rn, $Rm",
799 [(set GPRnopc:$Rd, (opnode GPRnopc:$Rn, rGPR:$Rm))]>,
812 (outs GPRnopc:$Rd), (ins GPRnopc:$Rn, t2_so_reg:$ShiftedRm),
813 IIC_iALUsi, opc, ".w\t$Rd, $Rn, $ShiftedRm",
814 [(set GPRnopc:$Rd, (opnode GPRnopc:$Rn, t2_so_reg:$ShiftedRm))]>,
830 def ri : T2sTwoRegImm<(outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm),
831 IIC_iALUi, opc, "\t$Rd, $Rn, $imm",
832 [(set rGPR:$Rd, CPSR, (opnode rGPR:$Rn, t2_so_imm:$imm, CPSR))]>,
840 def rr : T2sThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUr,
841 opc, ".w\t$Rd, $Rn, $Rm",
842 [(set rGPR:$Rd, CPSR, (opnode rGPR:$Rn, rGPR:$Rm, CPSR))]>,
854 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm),
855 IIC_iALUsi, opc, ".w\t$Rd, $Rn, $ShiftedRm",
856 [(set rGPR:$Rd, CPSR, (opnode rGPR:$Rn, t2_so_reg:$ShiftedRm, CPSR))]>,
870 (outs rGPR:$Rd), (ins rGPR:$Rm, ty:$imm), IIC_iMOVsi,
871 opc, ".w\t$Rd, $Rm, $imm",
872 [(set rGPR:$Rd, (opnode rGPR:$Rm, (i32 ty:$imm)))]>,
881 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMOVsr,
882 opc, ".w\t$Rd, $Rn, $Rm",
883 [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]>,
901 def : t2InstAlias<!strconcat(opc, "${s}${p}", " $Rd, $Rn, $imm"),
902 (!cast<Instruction>(NAME#"ri") rGPR:$Rd, rGPR:$Rn, ty:$imm, pred:$p,
904 def : t2InstAlias<!strconcat(opc, "${s}${p}", " $Rd, $Rn, $Rm"),
905 (!cast<Instruction>(NAME#"rr") rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p,
934 let Inst{11-8} = 0b1111; // Rd
946 let Inst{11-8} = 0b1111; // Rd
960 let Inst{11-8} = 0b1111; // Rd
1124 : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, rot_imm:$rot), IIC_iEXTr,
1125 opc, ".w\t$Rd, $Rm$rot",
1126 [(set rGPR:$Rd, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>,
1141 : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, rot_imm:$rot),
1142 IIC_iEXTr, opc, "\t$Rd, $Rm$rot",
1143 [(set rGPR:$Rd, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>,
1158 : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, rot_imm:$rot), IIC_iEXTr,
1159 opc, "\t$Rd, $Rm$rot", []>,
1174 : T2ThreeReg<(outs rGPR:$Rd),
1176 IIC_iEXTAsr, opc, "\t$Rd, $Rn, $Rm$rot",
1177 [(set rGPR:$Rd, (opnode rGPR:$Rn, (rotr rGPR:$Rm,rot_imm:$rot)))]>,
1189 : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm,rot_imm:$rot),
1190 IIC_iEXTAsr, opc, "\t$Rd, $Rn, $Rm$rot", []>,
1212 bits<4> Rd;
1215 let Inst{11-8} = Rd;
1223 def t2ADR : T2PCOneRegImm<(outs rGPR:$Rd),
1225 IIC_iALUi, "adr{$p}.w\t$Rd, $addr", []>,
1235 bits<4> Rd;
1237 let Inst{11-8} = Rd;
1248 def t2LEApcrel : t2PseudoInst<(outs rGPR:$Rd), (ins i32imm:$label, pred:$p),
1251 def t2LEApcrelJT : t2PseudoInst<(outs rGPR:$Rd),
1865 def t2MOVr : T2sTwoReg<(outs GPRnopc:$Rd), (ins GPR:$Rm), IIC_iMOVr,
1866 "mov", ".w\t$Rd, $Rm", []>, Sched<[WriteALU]> {
1874 def : t2InstAlias<"mov${p}.w $Rd, $Rm", (t2MOVr GPRnopc:$Rd, GPR:$Rm,
1876 def : t2InstAlias<"movs${p}.w $Rd, $Rm", (t2MOVr GPRnopc:$Rd, GPR:$Rm,
1878 def : t2InstAlias<"movs${p} $Rd, $Rm", (t2MOVr GPRnopc:$Rd, GPR:$Rm,
1884 def t2MOVi : T2sOneRegImm<(outs rGPR:$Rd), (ins t2_so_imm:$imm), IIC_iMOVi,
1885 "mov", ".w\t$Rd, $imm",
1886 [(set rGPR:$Rd, t2_so_imm:$imm)]>, Sched<[WriteALU]> {
1896 def : t2InstAlias<"movs${p}.w $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
1898 def : t2InstAlias<"movs${p} $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
1901 def : t2InstAlias<"mov${p}.w $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
1903 def : t2InstAlias<"mov${p} $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm:$imm,
1907 def t2MOVi16 : T2I<(outs rGPR:$Rd), (ins imm0_65535_expr:$imm), IIC_iMOVi,
1908 "movw", "\t$Rd, $imm",
1909 [(set rGPR:$Rd, imm0_65535:$imm)]>, Sched<[WriteALU]> {
1916 bits<4> Rd;
1919 let Inst{11-8} = Rd;
1927 def : t2InstAlias<"mov${p} $Rd, $imm",
1928 (t2MOVi16 rGPR:$Rd, imm256_65535_expr:$imm, pred:$p)>;
1930 def t2MOVi16_ga_pcrel : PseudoInst<(outs rGPR:$Rd),
1933 let Constraints = "$src = $Rd" in {
1934 def t2MOVTi16 : T2I<(outs rGPR:$Rd),
1936 "movt", "\t$Rd, $imm",
1937 [(set rGPR:$Rd,
1946 bits<4> Rd;
1949 let Inst{11-8} = Rd;
1957 def t2MOVTi16_ga_pcrel : PseudoInst<(outs rGPR:$Rd),
2104 def t2SEL : T2ThreeReg<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
2105 NoItinerary, "sel", "\t$Rd, $Rn, $Rm", []>,
2121 string asm = "\t$Rd, $Rn, $Rm">
2122 : T2I<(outs rGPR:$Rd), iops, NoItinerary, opc, asm, pat>,
2130 bits<4> Rd;
2134 let Inst{11-8} = Rd;
2142 [(set rGPR:$Rd, (int_arm_qadd rGPR:$Rn, rGPR:$Rm))],
2143 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
2148 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
2150 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
2153 [(set rGPR:$Rd, (int_arm_qsub rGPR:$Rn, rGPR:$Rm))],
2154 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
2218 def t2USAD8 : T2ThreeReg_mac<0, 0b111, 0b0000, (outs rGPR:$Rd),
2220 NoItinerary, "usad8", "\t$Rd, $Rn, $Rm", []>,
2224 def t2USADA8 : T2FourReg_mac<0, 0b111, 0b0000, (outs rGPR:$Rd),
2226 "usada8", "\t$Rd, $Rn, $Rm, $Ra", []>,
2233 bits<4> Rd;
2238 let Inst{11-8} = Rd;
2247 (outs rGPR:$Rd),
2249 NoItinerary, "ssat", "\t$Rd, $sat_imm, $Rn$sh", []> {
2258 (outs rGPR:$Rd), (ins imm1_16:$sat_imm, rGPR:$Rn), NoItinerary,
2259 "ssat16", "\t$Rd, $sat_imm, $Rn", []>,
2272 (outs rGPR:$Rd),
2274 NoItinerary, "usat", "\t$Rd, $sat_imm, $Rn$sh", []> {
2281 def t2USAT16: T2SatI<(outs rGPR:$Rd), (ins imm0_15:$sat_imm, rGPR:$Rn),
2283 "usat16", "\t$Rd, $sat_imm, $Rn", []>,
2315 def t2RRX : T2sTwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi,
2316 "rrx", "\t$Rd, $Rm",
2317 [(set rGPR:$Rd, (ARMrrx rGPR:$Rm))]>, Sched<[WriteALU]> {
2329 (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi,
2330 "lsrs", ".w\t$Rd, $Rm, #1",
2331 [(set rGPR:$Rd, (ARMsrl_flag rGPR:$Rm))]>,
2344 (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iMOVsi,
2345 "asrs", ".w\t$Rd, $Rm, #1",
2346 [(set rGPR:$Rd, (ARMsra_flag rGPR:$Rm))]>,
2381 bits<4> Rd;
2385 let Inst{11-8} = Rd;
2399 let Constraints = "$src = $Rd" in
2400 def t2BFC : T2BitFI<(outs rGPR:$Rd), (ins rGPR:$src, bf_inv_mask_imm:$imm),
2401 IIC_iUNAsi, "bfc", "\t$Rd, $imm",
2402 [(set rGPR:$Rd, (and rGPR:$src, bf_inv_mask_imm:$imm))]> {
2417 (outs rGPR:$Rd), (ins rGPR:$Rn, imm0_31:$lsb, imm1_32:$msb),
2418 IIC_iUNAsi, "sbfx", "\t$Rd, $Rn, $lsb, $msb", []> {
2426 (outs rGPR:$Rd), (ins rGPR:$Rn, imm0_31:$lsb, imm1_32:$msb),
2427 IIC_iUNAsi, "ubfx", "\t$Rd, $Rn, $lsb, $msb", []> {
2448 let Constraints = "$src = $Rd" in {
2449 def t2BFI : T2TwoRegBitFI<(outs rGPR:$Rd),
2451 IIC_iBITi, "bfi", "\t$Rd, $Rn, $imm",
2452 [(set rGPR:$Rd, (ARMbfi rGPR:$src, rGPR:$Rn,
2479 def i : T2sOneRegImm<(outs rGPR:$Rd), (ins t2_so_imm:$imm), iii,
2480 opc, "\t$Rd, $imm",
2481 [(set rGPR:$Rd, (opnode t2_so_imm:$imm))]>, Sched<[WriteALU]> {
2492 def r : T2sTwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm), iir,
2493 opc, ".w\t$Rd, $Rm",
2494 [(set rGPR:$Rd, (opnode rGPR:$Rm))]>, Sched<[WriteALU]> {
2504 def s : T2sOneRegShiftedReg<(outs rGPR:$Rd), (ins t2_so_reg:$ShiftedRm), iis,
2505 opc, ".w\t$Rd, $ShiftedRm",
2506 [(set rGPR:$Rd, (opnode t2_so_reg:$ShiftedRm))]>,
2548 def t2MUL: T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
2549 "mul", "\t$Rd, $Rn, $Rm",
2550 [(set rGPR:$Rd, (mul rGPR:$Rn, rGPR:$Rm))]> {
2559 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2560 "mla", "\t$Rd, $Rn, $Rm, $Ra",
2561 [(set rGPR:$Rd, (add (mul rGPR:$Rn, rGPR:$Rm), rGPR:$Ra))]>,
2570 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2571 "mls", "\t$Rd, $Rn, $Rm, $Ra",
2572 [(set rGPR:$Rd, (sub rGPR:$Ra, (mul rGPR:$Rn, rGPR:$Rm)))]>,
2617 def t2SMMUL : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
2618 "smmul", "\t$Rd, $Rn, $Rm",
2619 [(set rGPR:$Rd, (mulhs rGPR:$Rn, rGPR:$Rm))]>,
2628 def t2SMMULR : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
2629 "smmulr", "\t$Rd, $Rn, $Rm", []>,
2639 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2640 "smmla", "\t$Rd, $Rn, $Rm, $Ra",
2641 [(set rGPR:$Rd, (add (mulhs rGPR:$Rm, rGPR:$Rn), rGPR:$Ra))]>,
2650 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2651 "smmlar", "\t$Rd, $Rn, $Rm, $Ra", []>,
2660 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2661 "smmls", "\t$Rd, $Rn, $Rm, $Ra",
2662 [(set rGPR:$Rd, (sub rGPR:$Ra, (mulhs rGPR:$Rn, rGPR:$Rm)))]>,
2671 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2672 "smmlsr", "\t$Rd, $Rn, $Rm, $Ra", []>,
2681 def BB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2682 !strconcat(opc, "bb"), "\t$Rd, $Rn, $Rm",
2683 [(set rGPR:$Rd, (opnode (sext_inreg rGPR:$Rn, i16),
2694 def BT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2695 !strconcat(opc, "bt"), "\t$Rd, $Rn, $Rm",
2696 [(set rGPR:$Rd, (opnode (sext_inreg rGPR:$Rn, i16),
2707 def TB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2708 !strconcat(opc, "tb"), "\t$Rd, $Rn, $Rm",
2709 [(set rGPR:$Rd, (opnode (sra rGPR:$Rn, (i32 16)),
2720 def TT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2721 !strconcat(opc, "tt"), "\t$Rd, $Rn, $Rm",
2722 [(set rGPR:$Rd, (opnode (sra rGPR:$Rn, (i32 16)),
2733 def WB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2734 !strconcat(opc, "wb"), "\t$Rd, $Rn, $Rm",
2745 def WT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2746 !strconcat(opc, "wt"), "\t$Rd, $Rn, $Rm",
2761 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2762 !strconcat(opc, "bb"), "\t$Rd, $Rn, $Rm, $Ra",
2763 [(set rGPR:$Rd, (add rGPR:$Ra,
2775 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2776 !strconcat(opc, "bt"), "\t$Rd, $Rn, $Rm, $Ra",
2777 [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sext_inreg rGPR:$Rn, i16),
2788 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2789 !strconcat(opc, "tb"), "\t$Rd, $Rn, $Rm, $Ra",
2790 [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sra rGPR:$Rn, (i32 16)),
2801 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2802 !strconcat(opc, "tt"), "\t$Rd, $Rn, $Rm, $Ra",
2803 [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sra rGPR:$Rn, (i32 16)),
2814 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2815 !strconcat(opc, "wb"), "\t$Rd, $Rn, $Rm, $Ra",
2826 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2827 !strconcat(opc, "wt"), "\t$Rd, $Rn, $Rm, $Ra",
2842 def t2SMLALBB : T2FourReg_mac<1, 0b100, 0b1000, (outs rGPR:$Ra,rGPR:$Rd),
2843 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlalbb", "\t$Ra, $Rd, $Rn, $Rm",
2846 def t2SMLALBT : T2FourReg_mac<1, 0b100, 0b1001, (outs rGPR:$Ra,rGPR:$Rd),
2847 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlalbt", "\t$Ra, $Rd, $Rn, $Rm",
2850 def t2SMLALTB : T2FourReg_mac<1, 0b100, 0b1010, (outs rGPR:$Ra,rGPR:$Rd),
2851 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltb", "\t$Ra, $Rd, $Rn, $Rm",
2854 def t2SMLALTT : T2FourReg_mac<1, 0b100, 0b1011, (outs rGPR:$Ra,rGPR:$Rd),
2855 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltt", "\t$Ra, $Rd, $Rn, $Rm",
2861 0, 0b010, 0b0000, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2862 IIC_iMAC32, "smuad", "\t$Rd, $Rn, $Rm", []>,
2867 0, 0b010, 0b0001, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2868 IIC_iMAC32, "smuadx", "\t$Rd, $Rn, $Rm", []>,
2873 0, 0b100, 0b0000, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2874 IIC_iMAC32, "smusd", "\t$Rd, $Rn, $Rm", []>,
2879 0, 0b100, 0b0001, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2880 IIC_iMAC32, "smusdx", "\t$Rd, $Rn, $Rm", []>,
2885 0, 0b010, 0b0000, (outs rGPR:$Rd),
2887 "\t$Rd, $Rn, $Rm, $Ra", []>,
2890 0, 0b010, 0b0001, (outs rGPR:$Rd),
2892 "\t$Rd, $Rn, $Rm, $Ra", []>,
2894 def t2SMLSD : T2FourReg_mac<0, 0b100, 0b0000, (outs rGPR:$Rd),
2896 "\t$Rd, $Rn, $Rm, $Ra", []>,
2898 def t2SMLSDX : T2FourReg_mac<0, 0b100, 0b0001, (outs rGPR:$Rd),
2900 "\t$Rd, $Rn, $Rm, $Ra", []>,
2902 def t2SMLALD : T2FourReg_mac<1, 0b100, 0b1100, (outs rGPR:$Ra,rGPR:$Rd),
2904 "\t$Ra, $Rd, $Rn, $Rm", []>,
2906 def t2SMLALDX : T2FourReg_mac<1, 0b100, 0b1101, (outs rGPR:$Ra,rGPR:$Rd),
2908 "\t$Ra, $Rd, $Rn, $Rm", []>,
2910 def t2SMLSLD : T2FourReg_mac<1, 0b101, 0b1100, (outs rGPR:$Ra,rGPR:$Rd),
2912 "\t$Ra, $Rd, $Rn, $Rm", []>,
2914 def t2SMLSLDX : T2FourReg_mac<1, 0b101, 0b1101, (outs rGPR:$Ra,rGPR:$Rd),
2916 "\t$Ra, $Rd, $Rn, $Rm", []>,
2923 def t2SDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iDIV,
2924 "sdiv", "\t$Rd, $Rn, $Rm",
2925 [(set rGPR:$Rd, (sdiv rGPR:$Rn, rGPR:$Rm))]>,
2934 def t2UDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iDIV,
2935 "udiv", "\t$Rd, $Rn, $Rm",
2936 [(set rGPR:$Rd, (udiv rGPR:$Rn, rGPR:$Rm))]>,
2961 def t2CLZ : T2I_misc<0b11, 0b00, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2962 "clz", "\t$Rd, $Rm", [(set rGPR:$Rd, (ctlz rGPR:$Rm))]>,
2965 def t2RBIT : T2I_misc<0b01, 0b10, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2966 "rbit", "\t$Rd, $Rm",
2967 [(set rGPR:$Rd, (bitreverse rGPR:$Rm))]>,
2970 def t2REV : T2I_misc<0b01, 0b00, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2971 "rev", ".w\t$Rd, $Rm", [(set rGPR:$Rd, (bswap rGPR:$Rm))]>,
2974 def t2REV16 : T2I_misc<0b01, 0b01, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2975 "rev16", ".w\t$Rd, $Rm",
2976 [(set rGPR:$Rd, (rotr (bswap rGPR:$Rm), (i32 16)))]>,
2979 def t2REVSH : T2I_misc<0b01, 0b11, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
2980 "revsh", ".w\t$Rd, $Rm",
2981 [(set rGPR:$Rd, (sra (bswap rGPR:$Rm), (i32 16)))]>,
2989 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, pkh_lsl_amt:$sh),
2990 IIC_iBITsi, "pkhbt", "\t$Rd, $Rn, $Rm$sh",
2991 [(set rGPR:$Rd, (or (and rGPR:$Rn, 0xFFFF),
3018 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, pkh_asr_amt:$sh),
3019 IIC_iBITsi, "pkhtb", "\t$Rd, $Rn, $Rm$sh",
3020 [(set rGPR:$Rd, (or (and rGPR:$Rn, 0xFFFF0000),
3060 : T2ThreeRegNoP<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), NoItinerary,
3061 !strconcat("crc32", suffix, "\t$Rd, $Rn, $Rm"),
3062 [(set rGPR:$Rd, (builtin rGPR:$Rn, rGPR:$Rm))]>,
3105 let Inst{11-8} = 0b1111; // Rd
3118 let Inst{11-8} = 0b1111; // Rd
3133 let Inst{11-8} = 0b1111; // Rd
3162 def t2MOVCCr : t2PseudoInst<(outs rGPR:$Rd),
3165 [(set rGPR:$Rd, (ARMcmov rGPR:$false, rGPR:$Rm,
3167 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
3171 : t2PseudoInst<(outs rGPR:$Rd),
3174 [(set rGPR:$Rd, (ARMcmov rGPR:$false,t2_so_imm:$imm,
3176 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
3181 : t2PseudoInst<(outs rGPR:$Rd),
3184 [(set rGPR:$Rd, (ARMcmov rGPR:$false, imm0_65535:$imm,
3186 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
3190 : t2PseudoInst<(outs rGPR:$Rd),
3193 [(set rGPR:$Rd,
3196 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
3199 : t2PseudoInst<(outs rGPR:$Rd),
3202 [(set rGPR:$Rd, (ARMcmov rGPR:$false,
3205 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
3279 bits<4> Rd;
3282 let Inst{3-0} = Rd;
3356 let mayStore = 1, Constraints = "@earlyclobber $Rd" in {
3357 def t2STREXB : T2I_strex<0b0100, (outs rGPR:$Rd),
3360 "strexb", "\t$Rd, $Rt, $addr", "",
3361 [(set rGPR:$Rd,
3363 def t2STREXH : T2I_strex<0b0101, (outs rGPR:$Rd),
3366 "strexh", "\t$Rd, $Rt, $addr", "",
3367 [(set rGPR:$Rd,
3370 def t2STREX : Thumb2I<(outs rGPR:$Rd), (ins rGPR:$Rt,
3373 "strex", "\t$Rd, $Rt, $addr", "",
3374 [(set rGPR:$Rd,
3376 bits<4> Rd;
3383 let Inst{11-8} = Rd;
3387 def t2STREXD : T2I_strex<0b0111, (outs rGPR:$Rd),
3390 "strexd", "\t$Rd, $Rt, $Rt2, $addr", "", [],
3396 def t2STLEXB : T2I_strex<0b1100, (outs rGPR:$Rd),
3399 "stlexb", "\t$Rd, $Rt, $addr", "",
3400 [(set rGPR:$Rd,
3404 def t2STLEXH : T2I_strex<0b1101, (outs rGPR:$Rd),
3407 "stlexh", "\t$Rd, $Rt, $addr", "",
3408 [(set rGPR:$Rd,
3412 def t2STLEX : Thumb2I<(outs rGPR:$Rd), (ins rGPR:$Rt,
3415 "stlex", "\t$Rd, $Rt, $addr", "",
3416 [(set rGPR:$Rd,
3419 bits<4> Rd;
3427 let Inst{3-0} = Rd;
3430 def t2STLEXD : T2I_strex<0b1111, (outs rGPR:$Rd),
3433 "stlexd", "\t$Rd, $Rt, $Rt2, $addr", "", [],
4005 def t2MRS_AR : T2I<(outs GPR:$Rd), (ins), NoItinerary, "mrs", "\t$Rd, apsr",
4007 bits<4> Rd;
4009 let Inst{11-8} = Rd;
4013 def : t2InstAlias<"mrs${p} $Rd, cpsr", (t2MRS_AR GPR:$Rd, pred:$p)>;
4015 def t2MRSsys_AR: T2I<(outs GPR:$Rd), (ins), NoItinerary, "mrs", "\t$Rd, spsr",
4017 bits<4> Rd;
4019 let Inst{11-8} = Rd;
4023 def t2MRSbanked : T2I<(outs rGPR:$Rd), (ins banked_reg:$banked),
4024 NoItinerary, "mrs", "\t$Rd, $banked", []>,
4027 bits<4> Rd;
4033 let Inst{11-8} = Rd;
4044 def t2MRS_M : T2I<(outs rGPR:$Rd), (ins msr_mask:$SYSm), NoItinerary,
4045 "mrs", "\t$Rd, $SYSm", []>,
4047 bits<4> Rd;
4050 let Inst{11-8} = Rd;
4393 def : t2InstAlias<"adc${s}${p} $Rd, $Rn, $Rm",
4394 (t2ADCrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>;
4395 def : t2InstAlias<"adc${s}${p} $Rd, $Rn, $ShiftedRm",
4396 (t2ADCrs rGPR:$Rd, rGPR:$Rn, t2_so_reg:$ShiftedRm,
4400 def : t2InstAlias<"sbc${s}${p} $Rd, $Rn, $Rm",
4401 (t2SBCrr rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>;
4402 def : t2InstAlias<"sbc${s}${p} $Rd, $Rn, $ShiftedRm",
4403 (t2SBCrs rGPR:$Rd, rGPR:$Rn, t2_so_reg:$ShiftedRm,
4407 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm",
4408 (t2ADDri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm:$imm, pred:$p,
4410 def : t2InstAlias<"add${p} $Rd, $Rn, $imm",
4411 (t2ADDri12 GPRnopc:$Rd, GPR:$Rn, imm0_4095:$imm, pred:$p)>;
4412 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $Rm",
4413 (t2ADDrr GPRnopc:$Rd, GPRnopc:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>;
4414 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $ShiftedRm",
4415 (t2ADDrs GPRnopc:$Rd, GPRnopc:$Rn, t2_so_reg:$ShiftedRm,
4429 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm",
4430 (t2SUBri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm, pred:$p,
4432 def : t2InstAlias<"add${p} $Rd, $Rn, $imm",
4433 (t2SUBri12 GPRnopc:$Rd, GPR:$Rn, imm0_4095_neg:$imm, pred:$p)>;
4440 def : t2InstAlias<"add${s}${p}.w $Rd, $Rn, $imm",
4441 (t2SUBri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm, pred:$p,
4443 def : t2InstAlias<"addw${p} $Rd, $Rn, $imm",
4444 (t2SUBri12 GPRnopc:$Rd, GPR:$Rn, imm0_4095_neg:$imm, pred:$p)>;
4453 def : t2InstAlias<"sub${s}${p} $Rd, $Rn, $imm",
4454 (t2SUBri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
4455 def : t2InstAlias<"sub${p} $Rd, $Rn, $imm",
4456 (t2SUBri12 GPRnopc:$Rd, GPR:$Rn, imm0_4095:$imm, pred:$p)>;
4457 def : t2InstAlias<"sub${s}${p} $Rd, $Rn, $Rm",
4458 (t2SUBrr GPRnopc:$Rd, GPRnopc:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>;
4459 def : t2InstAlias<"sub${s}${p} $Rd, $Rn, $ShiftedRm",
4460 (t2SUBrs GPRnopc:$Rd, GPRnopc:$Rn, t2_so_reg:$ShiftedRm,
4524 def : t2InstAlias<"mvn${s}${p}.w $Rd, $imm",
4525 (t2MVNi rGPR:$Rd, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
4526 def : t2InstAlias<"mvn${s}${p} $Rd, $Rm",
4527 (t2MVNr rGPR:$Rd, rGPR:$Rm, pred:$p, cc_out:$s)>;
4528 def : t2InstAlias<"mvn${s}${p} $Rd, $ShiftedRm",
4529 (t2MVNs rGPR:$Rd, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s)>;
4533 def : InstAlias<"pkhbt${p} $Rd, $Rn, $Rm",
4534 (t2PKHBT rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>,
4536 def : InstAlias<"pkhtb${p} $Rd, $Rn, $Rm",
4537 (t2PKHBT rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>,
4571 def : t2InstAlias<"rev${p} $Rd, $Rm", (t2REV rGPR:$Rd, rGPR:$Rm, pred:$p)>;
4572 def : t2InstAlias<"rev16${p} $Rd, $Rm", (t2REV16 rGPR:$Rd, rGPR:$Rm, pred:$p)>;
4573 def : t2InstAlias<"revsh${p} $Rd, $Rm", (t2REVSH rGPR:$Rd, rGPR:$Rm, pred:$p)>;
4578 def : t2InstAlias<"rsb${s}${p} $Rd, $Rn, $imm",
4579 (t2RSBri rGPR:$Rd, rGPR:$Rn, t2_so_imm:$imm, pred:$p, cc_out:$s)>;
4589 def : t2InstAlias<"ssat${p} $Rd, $sat_imm, $Rn",
4590 (t2SSAT rGPR:$Rd, imm1_32:$sat_imm, rGPR:$Rn, 0, pred:$p)>;
4591 def : t2InstAlias<"usat${p} $Rd, $sat_imm, $Rn",
4592 (t2USAT rGPR:$Rd, imm0_31:$sat_imm, rGPR:$Rn, 0, pred:$p)>;
4615 def : InstAlias<"sxtab${p} $Rd, $Rn, $Rm",
4616 (t2SXTAB rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>,
4618 def : InstAlias<"sxtah${p} $Rd, $Rn, $Rm",
4619 (t2SXTAH rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>,
4621 def : InstAlias<"sxtab16${p} $Rd, $Rn, $Rm",
4622 (t2SXTAB16 rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>,
4624 def : InstAlias<"sxtb16${p} $Rd, $Rm",
4625 (t2SXTB16 rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>,
4628 def : t2InstAlias<"sxtb${p} $Rd, $Rm",
4629 (t2SXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4630 def : t2InstAlias<"sxth${p} $Rd, $Rm",
4631 (t2SXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4632 def : t2InstAlias<"sxtb${p}.w $Rd, $Rm",
4633 (t2SXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4634 def : t2InstAlias<"sxth${p}.w $Rd, $Rm",
4635 (t2SXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4637 def : InstAlias<"uxtab${p} $Rd, $Rn, $Rm",
4638 (t2UXTAB rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>,
4640 def : InstAlias<"uxtah${p} $Rd, $Rn, $Rm",
4641 (t2UXTAH rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>,
4643 def : InstAlias<"uxtab16${p} $Rd, $Rn, $Rm",
4644 (t2UXTAB16 rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, 0, pred:$p)>,
4646 def : InstAlias<"uxtb16${p} $Rd, $Rm",
4647 (t2UXTB16 rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>,
4650 def : t2InstAlias<"uxtb${p} $Rd, $Rm",
4651 (t2UXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4652 def : t2InstAlias<"uxth${p} $Rd, $Rm",
4653 (t2UXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4654 def : t2InstAlias<"uxtb${p}.w $Rd, $Rm",
4655 (t2UXTB rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4656 def : t2InstAlias<"uxth${p}.w $Rd, $Rm",
4657 (t2UXTH rGPR:$Rd, rGPR:$Rm, 0, pred:$p)>;
4660 def : t2InstAlias<"uxtb${p} $Rd, $Rm$rot",
4661 (t2UXTB rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>;
4662 def : InstAlias<"uxtb16${p} $Rd, $Rm$rot",
4663 (t2UXTB16 rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>,
4665 def : t2InstAlias<"uxth${p} $Rd, $Rm$rot",
4666 (t2UXTH rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>;
4668 def : t2InstAlias<"sxtb${p} $Rd, $Rm$rot",
4669 (t2SXTB rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>;
4670 def : InstAlias<"sxtb16${p} $Rd, $Rm$rot",
4671 (t2SXTB16 rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>,
4673 def : t2InstAlias<"sxth${p} $Rd, $Rm$rot",
4674 (t2SXTH rGPR:$Rd, rGPR:$Rm, rot_imm:$rot, pred:$p)>;
4677 // "mov Rd, t2_so_imm_not" can be handled via "mvn" in assembly, just like
4679 def : t2InstAlias<"mov${p} $Rd, $imm",
4680 (t2MVNi rGPR:$Rd, t2_so_imm_not:$imm, pred:$p, zero_reg)>;
4681 def : t2InstAlias<"mvn${p} $Rd, $imm",
4682 (t2MOVi rGPR:$Rd, t2_so_imm_not:$imm, pred:$p, zero_reg)>;
4684 def : t2InstAlias<"bic${s}${p} $Rd, $Rn, $imm",
4685 (t2ANDri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
4690 def : t2InstAlias<"and${s}${p} $Rd, $Rn, $imm",
4691 (t2BICri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
4696 // Likewise, "add Rd, t2_so_imm_neg" -> sub
4697 def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm",
4698 (t2SUBri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm,
4700 def : t2InstAlias<"add${s}${p} $Rd, $imm",
4701 (t2SUBri GPRnopc:$Rd, GPRnopc:$Rd, t2_so_imm_neg:$imm,
4704 def : t2InstAlias<"cmp${p} $Rd, $imm",
4705 (t2CMNri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p)>;
4706 def : t2InstAlias<"cmn${p} $Rd, $imm",
4707 (t2CMPri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p)>;
4715 def : t2InstAlias<"neg${s}${p} $Rd, $Rm",
4716 (t2RSBri rGPR:$Rd, rGPR:$Rm, 0, pred:$p, cc_out:$s)>;
4720 def t2MOVsi: t2AsmPseudo<"mov${p} $Rd, $shift",
4721 (ins rGPR:$Rd, t2_so_reg:$shift, pred:$p)>;
4722 def t2MOVSsi: t2AsmPseudo<"movs${p} $Rd, $shift",
4723 (ins rGPR:$Rd, t2_so_reg:$shift, pred:$p)>;
4725 def t2MOVsr: t2AsmPseudo<"mov${p} $Rd, $shift",
4726 (ins rGPR:$Rd, so_reg_reg:$shift, pred:$p)>;
4727 def t2MOVSsr: t2AsmPseudo<"movs${p} $Rd, $shift",
4728 (ins rGPR:$Rd, so_reg_reg:$shift, pred:$p)>;
4731 def : t2InstAlias<"adr${p} $Rd, $addr",
4732 (t2ADR rGPR:$Rd, t2adrlabel:$addr, pred:$p)>;
4757 def : t2InstAlias<"add${p} $Rd, pc, $imm",
4758 (t2ADR rGPR:$Rd, imm0_4095:$imm, pred:$p)>;