Lines Matching refs:ShiftImm

496     unsigned ShiftImm;        // shift for OffsetReg.  member
506 unsigned ShiftImm; member
518 unsigned ShiftImm; member
524 unsigned ShiftImm; member
1194 Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm != 1 || in isMemTBH()
1211 if (Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm > 3) in isT2MemRegOffset()
1732 ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); in addRegShiftedRegOperands()
1741 unsigned Imm = (RegShiftedImm.ShiftImm == 32 ? 0 : RegShiftedImm.ShiftImm); in addRegShiftedImmOperands()
2054 Memory.ShiftImm, Memory.ShiftType); in addAddrMode2Operands()
2233 Memory.ShiftImm, Memory.ShiftType); in addMemRegOffsetOperands()
2243 Inst.addOperand(MCOperand::createImm(Memory.ShiftImm)); in addT2MemRegOffsetOperands()
2315 unsigned Imm = ARM_AM::getAM2Opc(opc, PostIdxReg.ShiftImm, in addPostIdxRegShiftedOperands()
2543 unsigned ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister() argument
2549 Op->RegShiftedReg.ShiftImm = ShiftImm; in CreateShiftedRegister()
2557 unsigned ShiftImm, SMLoc S, SMLoc E) { in CreateShiftedImmediate() argument
2561 Op->RegShiftedImm.ShiftImm = ShiftImm; in CreateShiftedImmediate()
2689 unsigned ShiftImm, unsigned Alignment, bool isNegative, SMLoc S, in CreateMem() argument
2696 Op->Memory.ShiftImm = ShiftImm; in CreateMem()
2707 unsigned ShiftImm, SMLoc S, SMLoc E) { in CreatePostIdxReg() argument
2712 Op->PostIdxReg.ShiftImm = ShiftImm; in CreatePostIdxReg()
2815 << PostIdxReg.ShiftImm; in print()
2844 << " #" << RegShiftedImm.ShiftImm << ">"; in print()
4528 unsigned ShiftImm = 0; in parsePostIdxReg() local
4531 if (parseMemRegOffsetShift(ShiftTy, ShiftImm)) in parsePostIdxReg()
4539 ShiftImm, S, E)); in parsePostIdxReg()
4854 unsigned ShiftImm = 0; in parseMemory() local
4857 if (parseMemRegOffsetShift(ShiftType, ShiftImm)) in parseMemory()
4868 ShiftType, ShiftImm, 0, isNegative, in parseMemory()