Lines Matching refs:SrcReg
42 unsigned DestReg, unsigned SrcReg, in copyPhysReg() argument
48 assert(ARM::GPRRegClass.contains(DestReg, SrcReg) && in copyPhysReg()
51 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
54 .addReg(SrcReg, getKillRegState(KillSrc))); in copyPhysReg()
64 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
72 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot() argument
76 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot()
77 isARMLowRegister(SrcReg))) && "Unknown regclass!"); in storeRegToStackSlot()
80 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot()
81 isARMLowRegister(SrcReg))) { in storeRegToStackSlot()
91 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()