168     static bool replaceReg(unsigned OldR, unsigned NewR,
172     static bool replaceRegWithSub(unsigned OldR, unsigned NewR,
175         unsigned NewR, unsigned NewSR, MachineRegisterInfo &MRI);
325 bool HexagonBitSimplify::replaceReg(unsigned OldR, unsigned NewR,  in replaceReg()  argument
328       !TargetRegisterInfo::isVirtualRegister(NewR))  in replaceReg()
334     I->setReg(NewR);  in replaceReg()
340 bool HexagonBitSimplify::replaceRegWithSub(unsigned OldR, unsigned NewR,  in replaceRegWithSub()  argument
343       !TargetRegisterInfo::isVirtualRegister(NewR))  in replaceRegWithSub()
349     I->setReg(NewR);  in replaceRegWithSub()
357       unsigned NewR, unsigned NewSR, MachineRegisterInfo &MRI) {  in replaceSubWithSub()  argument
359       !TargetRegisterInfo::isVirtualRegister(NewR))  in replaceSubWithSub()
367     I->setReg(NewR);  in replaceSubWithSub()
1300       unsigned NewR = MRI.createVirtualRegister(FRC);  in processBlock()  local
1301       BuildMI(B, I, DL, HII.get(TargetOpcode::COPY), NewR)  in processBlock()
1303       HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);  in processBlock()
1304       BT.put(BitTracker::RegisterRef(NewR), SC);  in processBlock()
1562       unsigned NewR = MRI.createVirtualRegister(FRC);  in processBlock()  local
1564       BuildMI(B, At, DL, HII.get(TargetOpcode::COPY), NewR)  in processBlock()
1566       BT.put(BitTracker::RegisterRef(NewR), BT.get(MR));  in processBlock()
1926   unsigned NewR = MRI.createVirtualRegister(&Hexagon::DoubleRegsRegClass);  in genPackhl()  local
1928   BuildMI(B, MI, DL, HII.get(Hexagon::S2_packhl), NewR)  in genPackhl()
1931   HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);  in genPackhl()
1932   BT.put(BitTracker::RegisterRef(NewR), RC);  in genPackhl()
1952   unsigned NewR = 0;  in genExtractHalf()  local
1954     NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);  in genExtractHalf()
1955     BuildMI(B, MI, DL, HII.get(Hexagon::A2_zxth), NewR)  in genExtractHalf()
1958     NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);  in genExtractHalf()
1959     BuildMI(B, MI, DL, HII.get(Hexagon::S2_extractu), NewR)  in genExtractHalf()
1964   if (NewR == 0)  in genExtractHalf()
1966   HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);  in genExtractHalf()
1967   BT.put(BitTracker::RegisterRef(NewR), RC);  in genExtractHalf()
1991   unsigned NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);  in genCombineHalf()  local
1992   BuildMI(B, MI, DL, HII.get(COpc), NewR)  in genCombineHalf()
1995   HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);  in genCombineHalf()
1996   BT.put(BitTracker::RegisterRef(NewR), RC);  in genCombineHalf()
2045     unsigned NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);  in genExtractLow()  local
2046     auto MIB = BuildMI(B, MI, DL, HII.get(NewOpc), NewR)  in genExtractLow()
2052     HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);  in genExtractLow()
2053     BT.put(BitTracker::RegisterRef(NewR), RC);  in genExtractLow()
2100       unsigned NewR = MRI.createVirtualRegister(&Hexagon::PredRegsRegClass);  in simplifyTstbit()  local
2101       BuildMI(B, MI, DL, HII.get(Hexagon::S2_tstbit_i), NewR)  in simplifyTstbit()
2104       HBS::replaceReg(RD.Reg, NewR, MRI);  in simplifyTstbit()
2105       BT.put(NewR, RC);  in simplifyTstbit()
2109     unsigned NewR = MRI.createVirtualRegister(&Hexagon::PredRegsRegClass);  in simplifyTstbit()  local
2111     BuildMI(B, MI, DL, HII.get(NewOpc), NewR);  in simplifyTstbit()
2112     HBS::replaceReg(RD.Reg, NewR, MRI);  in simplifyTstbit()