95                      MachineOperand &HiOperand, MachineOperand &LoOperand);
98                      MachineOperand &HiOperand, MachineOperand &LoOperand);
101                      MachineOperand &HiOperand, MachineOperand &LoOperand);
104                      MachineOperand &HiOperand, MachineOperand &LoOperand);
120     const MachineOperand &Op0 = MI->getOperand(0);  in isCombinableInstType()
121     const MachineOperand &Op1 = MI->getOperand(1);  in isCombinableInstType()
133     const MachineOperand &Op0 = MI->getOperand(0);  in isCombinableInstType()
134     const MachineOperand &Op1 = MI->getOperand(1);  in isCombinableInstType()
161     const MachineOperand &Op = I->getOperand(1);  in isGreaterThanNBitTFRI()
196     MachineOperand &Op = MI->getOperand(I);  in removeKillInfo()
215 static unsigned UseReg(const MachineOperand& MO) {  in UseReg()
352         MachineOperand &Op = MI->getOperand(OpdIdx);  in findPotentialNewifiableTFRs()
384       MachineOperand &Op = MI->getOperand(I);  in findPotentialNewifiableTFRs()
518   MachineOperand &LoOperand = IsI1Loreg ? I1->getOperand(1) :  in combine()
520   MachineOperand &HiOperand = IsI1Loreg ? I2->getOperand(1) :  in combine()
544                                          MachineOperand &HiOperand,  in emitCombineII()
545                                          MachineOperand &LoOperand) {  in emitCombineII()
638                                          MachineOperand &HiOperand,  in emitCombineIR()
639                                          MachineOperand &LoOperand) {  in emitCombineIR()
686                                          MachineOperand &HiOperand,  in emitCombineRI()
687                                          MachineOperand &LoOperand) {  in emitCombineRI()
735                                          MachineOperand &HiOperand,  in emitCombineRR()
736                                          MachineOperand &LoOperand) {  in emitCombineRR()