Lines Matching refs:AnalyzeBranch

437   bool NotAnalyzed = TII->AnalyzeBranch(*ExitingBlock, TB, FB, Cond, false);  in findInductionRegister()
584   bool NotAnalyzed = TII->AnalyzeBranch(*ExitingBlock, TB, FB, Cond, false);  in getLoopTripCount()
596     bool NotAnalyzed = TII->AnalyzeBranch(*Latch, LTB, LFB, LCond, false);  in getLoopTripCount()
1187     if (TII->AnalyzeBranch(*ExitingBlock, TB, FB, Cond, false))  in convertToHardwareLoop()
1426     if (TII->AnalyzeBranch(*MI->getParent(), TBB, FBB, Cond, false))  in loopCountMayWrapOrUnderFlow()
1622   bool NotAnalyzed = TII->AnalyzeBranch(*ExitingBlock, TB, FB, Cond, false);  in fixupInductionVariable()
1629     bool NotAnalyzed = TII->AnalyzeBranch(*Latch, LTB, LFB, LCond, false);  in fixupInductionVariable()
1840   if (TII->AnalyzeBranch(*ExitingBlock, TB, FB, Tmp1, false))  in createPreheaderForLoop()
1845     bool NotAnalyzed = TII->AnalyzeBranch(*PB, TB, FB, Tmp1, false);  in createPreheaderForLoop()
1931       bool NotAnalyzed = TII->AnalyzeBranch(*PB, TB, FB, Tmp2, false);  in createPreheaderForLoop()
1943   bool LatchNotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Tmp2, false);  in createPreheaderForLoop()