Lines Matching refs:UseHVX

333   bool UseHVX = HST.useHVXOps();  in CC_HexagonVector()  local
336 if ((UseHVX && !UseHVXDbl) && in CC_HexagonVector()
347 if ((UseHVX && !UseHVXDbl) && in CC_HexagonVector()
359 if ((UseHVX && UseHVXDbl) && in CC_HexagonVector()
370 if ((UseHVX && UseHVXDbl) && in CC_HexagonVector()
389 bool UseHVX = HST.useHVXOps(); in RetCC_Hexagon() local
417 (LocVT == MVT::v1024i1 && UseHVX && UseHVXDbl)) { in RetCC_Hexagon()
479 bool UseHVX = HST.useHVXOps(); in RetCC_HexagonVector() local
489 unsigned Req = (UseHVX && UseHVXDbl) ? Hexagon::V0 : Hexagon::W0; in RetCC_HexagonVector()
881 bool UseHVX = HST.useHVXOps(); in getIndexedAddressParts() local
885 (UseHVX && UseHVXDbl) && (VT == MVT::v32i32 || VT == MVT::v16i64 || in getIndexedAddressParts()
888 UseHVX && !UseHVXDbl && (VT == MVT::v16i32 || VT == MVT::v8i64 || in getIndexedAddressParts()
1054 bool UseHVX = Subtarget.useHVXOps(), UseHVXDbl = Subtarget.useHVXDblOps(); in LowerFormalArguments() local
1088 } else if (UseHVX && UseHVXDbl && in LowerFormalArguments()
1103 } else if (UseHVX && UseHVXDbl && in LowerFormalArguments()
1520 bool UseHVX = Subtarget.useHVXOps(); in HexagonTargetLowering() local
1810 if (UseHVX) { in HexagonTargetLowering()
2348 bool UseHVX = Subtarget.useHVXOps(); in LowerCONCAT_VECTORS() local
2362 if (UseHVX) { in LowerCONCAT_VECTORS()
2647 bool UseHVX = Subtarget.useHVXOps(), UseHVXDbl = Subtarget.useHVXDblOps(); in getRegForInlineAsmConstraint() local
2689 if (Subtarget.hasV60TOps() && UseHVX && UseHVXDbl) in getRegForInlineAsmConstraint()