Lines Matching refs:Rtt

851                 (ins DoubleRegs:$Rss, DoubleRegs:$Rtt),
852   "$Rdd = "#opc#"($Rss, $Rtt)"#!if(isRnd, ":rnd", "")
858     bits<5> Rtt;
864     let Inst{20-16} = !if (SwapOps, Rtt, Rss);
865     let Inst{12-8} = !if (SwapOps, Rss, Rtt);
871 // Rdd=vadd[u][bhw](Rss,Rtt)
878 // Rdd=vadd[u][bhw](Rss,Rtt):sat
887 // Rdd=vavg[u][bhw](Rss,Rtt)
896 // Rdd=vavg[u][bhw](Rss,Rtt)[:rnd|:crnd]
906 // Rdd=vnavg[bh](Rss,Rtt)
912 // Rdd=vnavg[bh](Rss,Rtt)[:rnd|:crnd]:sat
920 // Rdd=vsub[u][bh](Rss,Rtt)
927 // Rdd=vsub[u][bh](Rss,Rtt):sat
935 // Rdd=vmax[u][bhw](Rss,Rtt)
943 // Rdd=vmin[u][bhw](Rss,Rtt)
957               (ins DoubleRegs:$Rss, DoubleRegs:$Rtt),
958   "$Pd = "#Str#"($Rss, $Rtt)", [],
962     bits<5> Rtt;
971     let Inst{12-8} = Rtt;
975   : Pat<(i1 (Op (T DoubleRegs:$Rss), (T DoubleRegs:$Rtt))),
976         (i1 (MI DoubleRegs:$Rss, DoubleRegs:$Rtt))>;
2578   : MInst <(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rss, DoubleRegs:$Rtt),
2579   "$Rdd = "#opc#"($Rss, $Rtt)"#!if(hasShift,":<<1","")
2585     bits<5> Rtt;
2594     let Inst{12-8} = Rtt;
2597 // Vector complex multiply imaginary: Rdd=vcmpyi(Rss,Rtt)[:<<1]:sat
2602 // Vector complex multiply real: Rdd=vcmpyr(Rss,Rtt)[:<<1]:sat
2606 // Vector dual multiply: Rdd=vdmpy(Rss,Rtt)[:<<1]:sat
2610 // Vector multiply even halfwords: Rdd=vmpyeh(Rss,Rtt)[:<<1]:sat
2614 //Rdd=vmpywoh(Rss,Rtt)[:<<1][:rnd]:sat
2620 //Rdd=vmpyweh(Rss,Rtt)[:<<1][:rnd]:sat
2626 //Rdd=vmpywouh(Rss,Rtt)[:<<1][:rnd]:sat
2632 //Rdd=vmpyweuh(Rss,Rtt)[:<<1][:rnd]:sat
2864   : MInst <(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rss, DoubleRegs:$Rtt),
2865   "$Rdd = "#opc#"($Rss, $Rtt"#!if(isConj,"*)",")"),
2869     bits<5> Rtt;
2878     let Inst{12-8} = Rtt;
2883            (ins DoubleRegs:$dst2, DoubleRegs:$Rss, DoubleRegs:$Rtt),
2884   "$Rdd += "#opc#"($Rss, $Rtt"#!if(isConj,"*)",")"),
2888     bits<5> Rtt;
2897     let Inst{12-8} = Rtt;
2901   : MInst <(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rtt, DoubleRegs:$Rss),
2902   "$Rdd = "#opc#"($Rtt, $Rss)",
2906     bits<5> Rtt;
2915     let Inst{12-8} = Rtt;
2922 // Vector sum of absolute differences unsigned bytes: Rdd=vrsadub(Rss,Rtt)
2926 // Vector absolute difference: Rdd=vabsdiffh(Rtt,Rss)
2929 // Vector absolute difference words: Rdd=vabsdiffw(Rtt,Rss)
2933 // Rdd[+]=vrcmpy[ir](Rss,Rtt[*])
2945 // Rdd[+]=vrmpyh(Rss,Rtt)
2957            (ins DoubleRegs:$dst2, DoubleRegs:$Rss, DoubleRegs:$Rtt),
2958   "$Rxx += "#opc#"($Rss, $Rtt)"#!if(hasShift,":<<1","")
2963     bits<5> Rtt;
2972     let Inst{12-8} = Rtt;
2978            (ins DoubleRegs:$dst2, DoubleRegs:$Rss, DoubleRegs:$Rtt),
2979   "$Rxx += "#opc#"($Rss, $Rtt)"#!if(hasShift,":<<1","")
2984     bits<5> Rtt;
2993     let Inst{12-8} = Rtt;
2997 // Rxx+=vmpyw[eo]h(Rss,Rtt)[:<<1][:rnd]:sat
3009 // Rxx+=vmpyw[eo]uh(Rss,Rtt)[:<<1][:rnd]:sat
3021 // Rxx+=vmpyeh(Rss,Rtt)[:<<1][:sat]
3027 // Rxx+=vdmpy(Rss,Rtt)[:sat]
3032 // Rxx+=vcmpy[ir](Rss,Rtt):sat
5021 // Rss <= Rtt -> !(Rss > Rtt).
5051 // Map cmpge(Rss, Rtt) -> !cmpgt(Rtt, Rss).
5081 // Map from cmpleu(Rss, Rtt) -> !cmpgtu(Rss, Rtt-1).
5391             (ins DoubleRegs:$Rss, DoubleRegs:$Rtt, PredRegs:$Pu),
5392   "$Rdd = "#mnemonic#"($Rss, $Rtt, $Pu)",
5396     bits<5> Rtt;
5403     let Inst{20-16} = !if (SwapOps, Rtt, Rss);
5404     let Inst{12-8} = !if (SwapOps, Rss, Rtt);
5513            (ins DoubleRegs:$Rss, DoubleRegs:$Rtt, u3Imm:$u3),
5514   "$Rdd = "#mnemonic#"($Rss, $Rtt, #$u3)" ,
5518     bits<5> Rtt;
5525     let Inst{20-16} = !if(MajOp, Rss, Rtt);
5526     let Inst{12-8}  =  !if(MajOp, Rtt, Rss);
5585 // Rx=insert(Rs,Rtt)
5592 // Rxx=insert(Rss,Rtt)
5632   : SInst <(outs IntRegs:$Rd), (ins IntRegs:$Rs, DoubleRegs:$Rtt),
5633   "$Rd = "#mnemonic#"($Rs, $Rtt)",
5637     bits<5> Rtt;
5643     let Inst{12-8}  = Rtt;
5681 // Rdd=extractu(Rss,Rtt)
5686 // Rd=extractu(Rs,Rtt)