Lines Matching refs:Rt

103   (ins IntRegs:$Rs, DoubleRegs:$Rt), "$Rd = add($Rs, $Rt)",
105                                         (i64 DoubleRegs:$Rt))))],
111   : ALU64Inst<(outs DoubleRegs:$Rd), (ins DoubleRegs:$Rt, DoubleRegs:$Rs),
113           #"($Rt, $Rs)", [], "", ALU64_tc_2_SLOT23> {
116   bits<5> Rt;
122   let Inst{20-16} = !if(isMax, Rt, Rs);
123   let Inst{12-8} = !if(isMax, Rs, Rt);
218  : MInst<(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rss, IntRegs:$Rt),
219  "$Rdd=vrcmpys($Rss,$Rt):<<1:sat">;
260   : MInst <(outs IntRegs:$Rd), (ins DoubleRegs:$Rss, IntRegs:$Rt),
261   "$Rd=vrcmpys($Rss,$Rt):<<1:rnd:sat">;