Lines Matching refs:ImmOp

106 class T_vstore_ai <string mnemonic, string baseOp, Operand ImmOp,
108   : V6_STInst <(outs), (ins IntRegs:$src1, ImmOp:$src2, RC:$src3),
146 class T_vstore_new_ai <string baseOp, Operand ImmOp, RegisterClass RC, bit isNT>
147   : V6_STInst <(outs ), (ins IntRegs:$src1, ImmOp:$src2, RC:$src3),
175 class T_vstore_pred_ai <string mnemonic, string baseOp, Operand ImmOp,
178                (ins PredRegs:$src1, IntRegs:$src2, ImmOp:$src3, RC:$src4),
237 class T_vstore_qpred_ai <Operand ImmOp, RegisterClass RC,
240                (ins VecPredRegs:$src1, IntRegs:$src2, ImmOp:$src3, RC:$src4),
276 class T_vstore_new_pred_ai <string baseOp, Operand ImmOp, RegisterClass RC,
279                (ins PredRegs:$src1, IntRegs:$src2, ImmOp:$src3, RC:$src4),
323 class T_vload_pi<string asmStr, Operand ImmOp, RegisterClass RC>
325                (ins IntRegs:$src1, ImmOp:$src2), asmStr, [],
388 class T_vstore_pi <string mnemonic, string baseOp, Operand ImmOp,
391                (ins IntRegs:$src1, ImmOp:$src2, RC:$src3),
430 class T_vstore_new_pi <string baseOp, Operand ImmOp, RegisterClass RC, bit isNT>
432                (ins IntRegs:$src1, ImmOp:$src2, RC:$src3),
463 class T_vstore_pred_pi <string mnemonic, string baseOp, Operand ImmOp,
466              (ins PredRegs:$src1, IntRegs:$src2, ImmOp:$src3, RC:$src4),
526 class T_vstore_qpred_pi <Operand ImmOp, RegisterClass RC, bit isPredNot = 0,
529                (ins VecPredRegs:$src1, IntRegs:$src2, ImmOp:$src3, RC:$src4),
567 class T_vstore_new_pred_pi <string baseOp, Operand ImmOp, RegisterClass RC,
570                (ins PredRegs:$src1, IntRegs:$src2, ImmOp:$src3, RC:$src4),
760 class STrivv_template<string mnemonic, Operand ImmOp, RegisterClass RC>:
761         VSTInst<(outs), (ins IntRegs:$addr, ImmOp:$off, RC:$src),
820 class LDrivv_template<string mnemonic, Operand ImmOp, RegisterClass RC>
821   : V6_LDInst <(outs RC:$dst), (ins IntRegs:$addr, ImmOp:$off),
2048 class T_HVX_rol <string asmString, RegisterClass RC, Operand ImmOp >
2049   : SInst2 <(outs RC:$dst), (ins  RC:$src1, ImmOp:$src2), asmString>;
2061 class T_HVX_rol_acc <string asmString, RegisterClass RC, Operand ImmOp>
2062   : SInst2 <(outs RC:$dst), (ins RC:$_src_, RC:$src1, ImmOp:$src2),