Lines Matching refs:v4i8
17 def V4I8: PatLeaf<(v4i8 IntRegs:$R)>;
67 defm : bitconvert_32<v4i8, i32>;
69 defm : bitconvert_32<v2i16, v4i8>;
138 def: Pat<(v4i8 (HexagonVSPLATB I32:$Rs)), (S2_vsplatrb I32:$Rs)>;
302 // Adds two v4i8: Hexagon does not have an insn for this one, so we
304 def: Pat<(v4i8 (add (v4i8 IntRegs:$Rs), (v4i8 IntRegs:$Rt))),
307 // Subtract two v4i8: Hexagon does not have an insn for this one, so we
309 def: Pat<(v4i8 (sub (v4i8 IntRegs:$Rs), (v4i8 IntRegs:$Rt))),
315 def: Pat<(v4i8 (select I1:$Pu, V4I8:$Rs, V4I8:$Rt)),
377 def: Pat<(v4i8 (trunc V4I16:$Rs)),
440 // Multiplies two v4i8 vectors.
441 def: Pat<(v4i8 (mul V4I8:$Rs, V4I8:$Rt)),
445 def: Pat<(v4i8 (mul V4I8:$Rs, V4I8:$Rt)),
491 // Truncated store from v4i16 to v4i8.
494 [{ return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4i8; }]>;