Lines Matching refs:def
159 def : T_RR_pat <M2_mpy_ll_s1, int_hexagon_M2_mpy_ll_s1>;
160 def : T_RR_pat <M2_mpy_ll_s0, int_hexagon_M2_mpy_ll_s0>;
161 def : T_RR_pat <M2_mpy_lh_s1, int_hexagon_M2_mpy_lh_s1>;
162 def : T_RR_pat <M2_mpy_lh_s0, int_hexagon_M2_mpy_lh_s0>;
163 def : T_RR_pat <M2_mpy_hl_s1, int_hexagon_M2_mpy_hl_s1>;
164 def : T_RR_pat <M2_mpy_hl_s0, int_hexagon_M2_mpy_hl_s0>;
165 def : T_RR_pat <M2_mpy_hh_s1, int_hexagon_M2_mpy_hh_s1>;
166 def : T_RR_pat <M2_mpy_hh_s0, int_hexagon_M2_mpy_hh_s0>;
168 def : T_RR_pat <M2_mpyu_ll_s1, int_hexagon_M2_mpyu_ll_s1>;
169 def : T_RR_pat <M2_mpyu_ll_s0, int_hexagon_M2_mpyu_ll_s0>;
170 def : T_RR_pat <M2_mpyu_lh_s1, int_hexagon_M2_mpyu_lh_s1>;
171 def : T_RR_pat <M2_mpyu_lh_s0, int_hexagon_M2_mpyu_lh_s0>;
172 def : T_RR_pat <M2_mpyu_hl_s1, int_hexagon_M2_mpyu_hl_s1>;
173 def : T_RR_pat <M2_mpyu_hl_s0, int_hexagon_M2_mpyu_hl_s0>;
174 def : T_RR_pat <M2_mpyu_hh_s1, int_hexagon_M2_mpyu_hh_s1>;
175 def : T_RR_pat <M2_mpyu_hh_s0, int_hexagon_M2_mpyu_hh_s0>;
177 def : T_RR_pat <M2_mpy_sat_ll_s1, int_hexagon_M2_mpy_sat_ll_s1>;
178 def : T_RR_pat <M2_mpy_sat_ll_s0, int_hexagon_M2_mpy_sat_ll_s0>;
179 def : T_RR_pat <M2_mpy_sat_lh_s1, int_hexagon_M2_mpy_sat_lh_s1>;
180 def : T_RR_pat <M2_mpy_sat_lh_s0, int_hexagon_M2_mpy_sat_lh_s0>;
181 def : T_RR_pat <M2_mpy_sat_hl_s1, int_hexagon_M2_mpy_sat_hl_s1>;
182 def : T_RR_pat <M2_mpy_sat_hl_s0, int_hexagon_M2_mpy_sat_hl_s0>;
183 def : T_RR_pat <M2_mpy_sat_hh_s1, int_hexagon_M2_mpy_sat_hh_s1>;
184 def : T_RR_pat <M2_mpy_sat_hh_s0, int_hexagon_M2_mpy_sat_hh_s0>;
186 def : T_RR_pat <M2_mpy_rnd_ll_s1, int_hexagon_M2_mpy_rnd_ll_s1>;
187 def : T_RR_pat <M2_mpy_rnd_ll_s0, int_hexagon_M2_mpy_rnd_ll_s0>;
188 def : T_RR_pat <M2_mpy_rnd_lh_s1, int_hexagon_M2_mpy_rnd_lh_s1>;
189 def : T_RR_pat <M2_mpy_rnd_lh_s0, int_hexagon_M2_mpy_rnd_lh_s0>;
190 def : T_RR_pat <M2_mpy_rnd_hl_s1, int_hexagon_M2_mpy_rnd_hl_s1>;
191 def : T_RR_pat <M2_mpy_rnd_hl_s0, int_hexagon_M2_mpy_rnd_hl_s0>;
192 def : T_RR_pat <M2_mpy_rnd_hh_s1, int_hexagon_M2_mpy_rnd_hh_s1>;
193 def : T_RR_pat <M2_mpy_rnd_hh_s0, int_hexagon_M2_mpy_rnd_hh_s0>;
195 def : T_RR_pat <M2_mpy_sat_rnd_ll_s1, int_hexagon_M2_mpy_sat_rnd_ll_s1>;
196 def : T_RR_pat <M2_mpy_sat_rnd_ll_s0, int_hexagon_M2_mpy_sat_rnd_ll_s0>;
197 def : T_RR_pat <M2_mpy_sat_rnd_lh_s1, int_hexagon_M2_mpy_sat_rnd_lh_s1>;
198 def : T_RR_pat <M2_mpy_sat_rnd_lh_s0, int_hexagon_M2_mpy_sat_rnd_lh_s0>;
199 def : T_RR_pat <M2_mpy_sat_rnd_hl_s1, int_hexagon_M2_mpy_sat_rnd_hl_s1>;
200 def : T_RR_pat <M2_mpy_sat_rnd_hl_s0, int_hexagon_M2_mpy_sat_rnd_hl_s0>;
201 def : T_RR_pat <M2_mpy_sat_rnd_hh_s1, int_hexagon_M2_mpy_sat_rnd_hh_s1>;
202 def : T_RR_pat <M2_mpy_sat_rnd_hh_s0, int_hexagon_M2_mpy_sat_rnd_hh_s0>;
211 def : T_RRR_pat <M2_mpy_acc_ll_s1, int_hexagon_M2_mpy_acc_ll_s1>;
212 def : T_RRR_pat <M2_mpy_acc_ll_s0, int_hexagon_M2_mpy_acc_ll_s0>;
213 def : T_RRR_pat <M2_mpy_acc_lh_s1, int_hexagon_M2_mpy_acc_lh_s1>;
214 def : T_RRR_pat <M2_mpy_acc_lh_s0, int_hexagon_M2_mpy_acc_lh_s0>;
215 def : T_RRR_pat <M2_mpy_acc_hl_s1, int_hexagon_M2_mpy_acc_hl_s1>;
216 def : T_RRR_pat <M2_mpy_acc_hl_s0, int_hexagon_M2_mpy_acc_hl_s0>;
217 def : T_RRR_pat <M2_mpy_acc_hh_s1, int_hexagon_M2_mpy_acc_hh_s1>;
218 def : T_RRR_pat <M2_mpy_acc_hh_s0, int_hexagon_M2_mpy_acc_hh_s0>;
220 def : T_RRR_pat <M2_mpyu_acc_ll_s1, int_hexagon_M2_mpyu_acc_ll_s1>;
221 def : T_RRR_pat <M2_mpyu_acc_ll_s0, int_hexagon_M2_mpyu_acc_ll_s0>;
222 def : T_RRR_pat <M2_mpyu_acc_lh_s1, int_hexagon_M2_mpyu_acc_lh_s1>;
223 def : T_RRR_pat <M2_mpyu_acc_lh_s0, int_hexagon_M2_mpyu_acc_lh_s0>;
224 def : T_RRR_pat <M2_mpyu_acc_hl_s1, int_hexagon_M2_mpyu_acc_hl_s1>;
225 def : T_RRR_pat <M2_mpyu_acc_hl_s0, int_hexagon_M2_mpyu_acc_hl_s0>;
226 def : T_RRR_pat <M2_mpyu_acc_hh_s1, int_hexagon_M2_mpyu_acc_hh_s1>;
227 def : T_RRR_pat <M2_mpyu_acc_hh_s0, int_hexagon_M2_mpyu_acc_hh_s0>;
229 def : T_RRR_pat <M2_mpy_nac_ll_s1, int_hexagon_M2_mpy_nac_ll_s1>;
230 def : T_RRR_pat <M2_mpy_nac_ll_s0, int_hexagon_M2_mpy_nac_ll_s0>;
231 def : T_RRR_pat <M2_mpy_nac_lh_s1, int_hexagon_M2_mpy_nac_lh_s1>;
232 def : T_RRR_pat <M2_mpy_nac_lh_s0, int_hexagon_M2_mpy_nac_lh_s0>;
233 def : T_RRR_pat <M2_mpy_nac_hl_s1, int_hexagon_M2_mpy_nac_hl_s1>;
234 def : T_RRR_pat <M2_mpy_nac_hl_s0, int_hexagon_M2_mpy_nac_hl_s0>;
235 def : T_RRR_pat <M2_mpy_nac_hh_s1, int_hexagon_M2_mpy_nac_hh_s1>;
236 def : T_RRR_pat <M2_mpy_nac_hh_s0, int_hexagon_M2_mpy_nac_hh_s0>;
238 def : T_RRR_pat <M2_mpyu_nac_ll_s1, int_hexagon_M2_mpyu_nac_ll_s1>;
239 def : T_RRR_pat <M2_mpyu_nac_ll_s0, int_hexagon_M2_mpyu_nac_ll_s0>;
240 def : T_RRR_pat <M2_mpyu_nac_lh_s1, int_hexagon_M2_mpyu_nac_lh_s1>;
241 def : T_RRR_pat <M2_mpyu_nac_lh_s0, int_hexagon_M2_mpyu_nac_lh_s0>;
242 def : T_RRR_pat <M2_mpyu_nac_hl_s1, int_hexagon_M2_mpyu_nac_hl_s1>;
243 def : T_RRR_pat <M2_mpyu_nac_hl_s0, int_hexagon_M2_mpyu_nac_hl_s0>;
244 def : T_RRR_pat <M2_mpyu_nac_hh_s1, int_hexagon_M2_mpyu_nac_hh_s1>;
245 def : T_RRR_pat <M2_mpyu_nac_hh_s0, int_hexagon_M2_mpyu_nac_hh_s0>;
247 def : T_RRR_pat <M2_mpy_acc_sat_ll_s1, int_hexagon_M2_mpy_acc_sat_ll_s1>;
248 def : T_RRR_pat <M2_mpy_acc_sat_ll_s0, int_hexagon_M2_mpy_acc_sat_ll_s0>;
249 def : T_RRR_pat <M2_mpy_acc_sat_lh_s1, int_hexagon_M2_mpy_acc_sat_lh_s1>;
250 def : T_RRR_pat <M2_mpy_acc_sat_lh_s0, int_hexagon_M2_mpy_acc_sat_lh_s0>;
251 def : T_RRR_pat <M2_mpy_acc_sat_hl_s1, int_hexagon_M2_mpy_acc_sat_hl_s1>;
252 def : T_RRR_pat <M2_mpy_acc_sat_hl_s0, int_hexagon_M2_mpy_acc_sat_hl_s0>;
253 def : T_RRR_pat <M2_mpy_acc_sat_hh_s1, int_hexagon_M2_mpy_acc_sat_hh_s1>;
254 def : T_RRR_pat <M2_mpy_acc_sat_hh_s0, int_hexagon_M2_mpy_acc_sat_hh_s0>;
256 def : T_RRR_pat <M2_mpy_nac_sat_ll_s1, int_hexagon_M2_mpy_nac_sat_ll_s1>;
257 def : T_RRR_pat <M2_mpy_nac_sat_ll_s0, int_hexagon_M2_mpy_nac_sat_ll_s0>;
258 def : T_RRR_pat <M2_mpy_nac_sat_lh_s1, int_hexagon_M2_mpy_nac_sat_lh_s1>;
259 def : T_RRR_pat <M2_mpy_nac_sat_lh_s0, int_hexagon_M2_mpy_nac_sat_lh_s0>;
260 def : T_RRR_pat <M2_mpy_nac_sat_hl_s1, int_hexagon_M2_mpy_nac_sat_hl_s1>;
261 def : T_RRR_pat <M2_mpy_nac_sat_hl_s0, int_hexagon_M2_mpy_nac_sat_hl_s0>;
262 def : T_RRR_pat <M2_mpy_nac_sat_hh_s1, int_hexagon_M2_mpy_nac_sat_hh_s1>;
263 def : T_RRR_pat <M2_mpy_nac_sat_hh_s0, int_hexagon_M2_mpy_nac_sat_hh_s0>;
271 def : T_RR_pat <M2_mpyd_hh_s0, int_hexagon_M2_mpyd_hh_s0>;
272 def : T_RR_pat <M2_mpyd_hl_s0, int_hexagon_M2_mpyd_hl_s0>;
273 def : T_RR_pat <M2_mpyd_lh_s0, int_hexagon_M2_mpyd_lh_s0>;
274 def : T_RR_pat <M2_mpyd_ll_s0, int_hexagon_M2_mpyd_ll_s0>;
275 def : T_RR_pat <M2_mpyd_hh_s1, int_hexagon_M2_mpyd_hh_s1>;
276 def : T_RR_pat <M2_mpyd_hl_s1, int_hexagon_M2_mpyd_hl_s1>;
277 def : T_RR_pat <M2_mpyd_lh_s1, int_hexagon_M2_mpyd_lh_s1>;
278 def : T_RR_pat <M2_mpyd_ll_s1, int_hexagon_M2_mpyd_ll_s1>;
280 def : T_RR_pat <M2_mpyd_rnd_hh_s0, int_hexagon_M2_mpyd_rnd_hh_s0>;
281 def : T_RR_pat <M2_mpyd_rnd_hl_s0, int_hexagon_M2_mpyd_rnd_hl_s0>;
282 def : T_RR_pat <M2_mpyd_rnd_lh_s0, int_hexagon_M2_mpyd_rnd_lh_s0>;
283 def : T_RR_pat <M2_mpyd_rnd_ll_s0, int_hexagon_M2_mpyd_rnd_ll_s0>;
284 def : T_RR_pat <M2_mpyd_rnd_hh_s1, int_hexagon_M2_mpyd_rnd_hh_s1>;
285 def : T_RR_pat <M2_mpyd_rnd_hl_s1, int_hexagon_M2_mpyd_rnd_hl_s1>;
286 def : T_RR_pat <M2_mpyd_rnd_lh_s1, int_hexagon_M2_mpyd_rnd_lh_s1>;
287 def : T_RR_pat <M2_mpyd_rnd_ll_s1, int_hexagon_M2_mpyd_rnd_ll_s1>;
289 def : T_RR_pat <M2_mpyud_hh_s0, int_hexagon_M2_mpyud_hh_s0>;
290 def : T_RR_pat <M2_mpyud_hl_s0, int_hexagon_M2_mpyud_hl_s0>;
291 def : T_RR_pat <M2_mpyud_lh_s0, int_hexagon_M2_mpyud_lh_s0>;
292 def : T_RR_pat <M2_mpyud_ll_s0, int_hexagon_M2_mpyud_ll_s0>;
293 def : T_RR_pat <M2_mpyud_hh_s1, int_hexagon_M2_mpyud_hh_s1>;
294 def : T_RR_pat <M2_mpyud_hl_s1, int_hexagon_M2_mpyud_hl_s1>;
295 def : T_RR_pat <M2_mpyud_lh_s1, int_hexagon_M2_mpyud_lh_s1>;
296 def : T_RR_pat <M2_mpyud_ll_s1, int_hexagon_M2_mpyud_ll_s1>;
304 def : T_PRR_pat <M2_mpyd_acc_hh_s0, int_hexagon_M2_mpyd_acc_hh_s0>;
305 def : T_PRR_pat <M2_mpyd_acc_hl_s0, int_hexagon_M2_mpyd_acc_hl_s0>;
306 def : T_PRR_pat <M2_mpyd_acc_lh_s0, int_hexagon_M2_mpyd_acc_lh_s0>;
307 def : T_PRR_pat <M2_mpyd_acc_ll_s0, int_hexagon_M2_mpyd_acc_ll_s0>;
309 def : T_PRR_pat <M2_mpyd_acc_hh_s1, int_hexagon_M2_mpyd_acc_hh_s1>;
310 def : T_PRR_pat <M2_mpyd_acc_hl_s1, int_hexagon_M2_mpyd_acc_hl_s1>;
311 def : T_PRR_pat <M2_mpyd_acc_lh_s1, int_hexagon_M2_mpyd_acc_lh_s1>;
312 def : T_PRR_pat <M2_mpyd_acc_ll_s1, int_hexagon_M2_mpyd_acc_ll_s1>;
314 def : T_PRR_pat <M2_mpyd_nac_hh_s0, int_hexagon_M2_mpyd_nac_hh_s0>;
315 def : T_PRR_pat <M2_mpyd_nac_hl_s0, int_hexagon_M2_mpyd_nac_hl_s0>;
316 def : T_PRR_pat <M2_mpyd_nac_lh_s0, int_hexagon_M2_mpyd_nac_lh_s0>;
317 def : T_PRR_pat <M2_mpyd_nac_ll_s0, int_hexagon_M2_mpyd_nac_ll_s0>;
319 def : T_PRR_pat <M2_mpyd_nac_hh_s1, int_hexagon_M2_mpyd_nac_hh_s1>;
320 def : T_PRR_pat <M2_mpyd_nac_hl_s1, int_hexagon_M2_mpyd_nac_hl_s1>;
321 def : T_PRR_pat <M2_mpyd_nac_lh_s1, int_hexagon_M2_mpyd_nac_lh_s1>;
322 def : T_PRR_pat <M2_mpyd_nac_ll_s1, int_hexagon_M2_mpyd_nac_ll_s1>;
324 def : T_PRR_pat <M2_mpyud_acc_hh_s0, int_hexagon_M2_mpyud_acc_hh_s0>;
325 def : T_PRR_pat <M2_mpyud_acc_hl_s0, int_hexagon_M2_mpyud_acc_hl_s0>;
326 def : T_PRR_pat <M2_mpyud_acc_lh_s0, int_hexagon_M2_mpyud_acc_lh_s0>;
327 def : T_PRR_pat <M2_mpyud_acc_ll_s0, int_hexagon_M2_mpyud_acc_ll_s0>;
329 def : T_PRR_pat <M2_mpyud_acc_hh_s1, int_hexagon_M2_mpyud_acc_hh_s1>;
330 def : T_PRR_pat <M2_mpyud_acc_hl_s1, int_hexagon_M2_mpyud_acc_hl_s1>;
331 def : T_PRR_pat <M2_mpyud_acc_lh_s1, int_hexagon_M2_mpyud_acc_lh_s1>;
332 def : T_PRR_pat <M2_mpyud_acc_ll_s1, int_hexagon_M2_mpyud_acc_ll_s1>;
334 def : T_PRR_pat <M2_mpyud_nac_hh_s0, int_hexagon_M2_mpyud_nac_hh_s0>;
335 def : T_PRR_pat <M2_mpyud_nac_hl_s0, int_hexagon_M2_mpyud_nac_hl_s0>;
336 def : T_PRR_pat <M2_mpyud_nac_lh_s0, int_hexagon_M2_mpyud_nac_lh_s0>;
337 def : T_PRR_pat <M2_mpyud_nac_ll_s0, int_hexagon_M2_mpyud_nac_ll_s0>;
339 def : T_PRR_pat <M2_mpyud_nac_hh_s1, int_hexagon_M2_mpyud_nac_hh_s1>;
340 def : T_PRR_pat <M2_mpyud_nac_hl_s1, int_hexagon_M2_mpyud_nac_hl_s1>;
341 def : T_PRR_pat <M2_mpyud_nac_lh_s1, int_hexagon_M2_mpyud_nac_lh_s1>;
342 def : T_PRR_pat <M2_mpyud_nac_ll_s1, int_hexagon_M2_mpyud_nac_ll_s1>;
345 def : T_PP_pat <M2_vcmpy_s1_sat_i, int_hexagon_M2_vcmpy_s1_sat_i>;
346 def : T_PP_pat <M2_vcmpy_s0_sat_i, int_hexagon_M2_vcmpy_s0_sat_i>;
349 def : T_PP_pat <M2_vcmpy_s1_sat_r, int_hexagon_M2_vcmpy_s1_sat_r>;
350 def : T_PP_pat <M2_vcmpy_s0_sat_r, int_hexagon_M2_vcmpy_s0_sat_r>;
353 def : T_PP_pat <M2_vdmpys_s1, int_hexagon_M2_vdmpys_s1>;
354 def : T_PP_pat <M2_vdmpys_s0, int_hexagon_M2_vdmpys_s0>;
357 def : T_PP_pat <M2_vmpy2es_s1, int_hexagon_M2_vmpy2es_s1>;
358 def : T_PP_pat <M2_vmpy2es_s0, int_hexagon_M2_vmpy2es_s0>;
361 def : T_PP_pat <M2_mmpyh_s0, int_hexagon_M2_mmpyh_s0>;
362 def : T_PP_pat <M2_mmpyh_s1, int_hexagon_M2_mmpyh_s1>;
363 def : T_PP_pat <M2_mmpyh_rs0, int_hexagon_M2_mmpyh_rs0>;
364 def : T_PP_pat <M2_mmpyh_rs1, int_hexagon_M2_mmpyh_rs1>;
367 def : T_PP_pat <M2_mmpyl_s0, int_hexagon_M2_mmpyl_s0>;
368 def : T_PP_pat <M2_mmpyl_s1, int_hexagon_M2_mmpyl_s1>;
369 def : T_PP_pat <M2_mmpyl_rs0, int_hexagon_M2_mmpyl_rs0>;
370 def : T_PP_pat <M2_mmpyl_rs1, int_hexagon_M2_mmpyl_rs1>;
373 def : T_PP_pat <M2_mmpyuh_s0, int_hexagon_M2_mmpyuh_s0>;
374 def : T_PP_pat <M2_mmpyuh_s1, int_hexagon_M2_mmpyuh_s1>;
375 def : T_PP_pat <M2_mmpyuh_rs0, int_hexagon_M2_mmpyuh_rs0>;
376 def : T_PP_pat <M2_mmpyuh_rs1, int_hexagon_M2_mmpyuh_rs1>;
379 def : T_PP_pat <M2_mmpyul_s0, int_hexagon_M2_mmpyul_s0>;
380 def : T_PP_pat <M2_mmpyul_s1, int_hexagon_M2_mmpyul_s1>;
381 def : T_PP_pat <M2_mmpyul_rs0, int_hexagon_M2_mmpyul_rs0>;
382 def : T_PP_pat <M2_mmpyul_rs1, int_hexagon_M2_mmpyul_rs1>;
385 def : T_PP_pat <A2_vraddub, int_hexagon_A2_vraddub>;
386 def : T_PPP_pat <A2_vraddub_acc, int_hexagon_A2_vraddub_acc>;
389 def : T_PP_pat <A2_vrsadub, int_hexagon_A2_vrsadub>;
390 def : T_PPP_pat <A2_vrsadub_acc, int_hexagon_A2_vrsadub_acc>;
393 def : T_PP_pat <M2_vabsdiffh, int_hexagon_M2_vabsdiffh>;
396 def : T_PP_pat <M2_vabsdiffw, int_hexagon_M2_vabsdiffw>;
400 def : T_PP_pat <M2_vrcmpyi_s0, int_hexagon_M2_vrcmpyi_s0>;
401 def : T_PP_pat <M2_vrcmpyi_s0c, int_hexagon_M2_vrcmpyi_s0c>;
402 def : T_PPP_pat <M2_vrcmaci_s0, int_hexagon_M2_vrcmaci_s0>;
403 def : T_PPP_pat <M2_vrcmaci_s0c, int_hexagon_M2_vrcmaci_s0c>;
405 def : T_PP_pat <M2_vrcmpyr_s0, int_hexagon_M2_vrcmpyr_s0>;
406 def : T_PP_pat <M2_vrcmpyr_s0c, int_hexagon_M2_vrcmpyr_s0c>;
407 def : T_PPP_pat <M2_vrcmacr_s0, int_hexagon_M2_vrcmacr_s0>;
408 def : T_PPP_pat <M2_vrcmacr_s0c, int_hexagon_M2_vrcmacr_s0c>;
412 def : T_PP_pat <M2_vrmpy_s0, int_hexagon_M2_vrmpy_s0>;
413 def : T_PPP_pat <M2_vrmac_s0, int_hexagon_M2_vrmac_s0>;
421 def : T_PPP_pat <M2_mmacls_s1, int_hexagon_M2_mmacls_s1>;
422 def : T_PPP_pat <M2_mmacls_s0, int_hexagon_M2_mmacls_s0>;
423 def : T_PPP_pat <M2_mmacls_rs1, int_hexagon_M2_mmacls_rs1>;
424 def : T_PPP_pat <M2_mmacls_rs0, int_hexagon_M2_mmacls_rs0>;
425 def : T_PPP_pat <M2_mmachs_s1, int_hexagon_M2_mmachs_s1>;
426 def : T_PPP_pat <M2_mmachs_s0, int_hexagon_M2_mmachs_s0>;
427 def : T_PPP_pat <M2_mmachs_rs1, int_hexagon_M2_mmachs_rs1>;
428 def : T_PPP_pat <M2_mmachs_rs0, int_hexagon_M2_mmachs_rs0>;
432 def : T_PPP_pat <M2_mmaculs_s1, int_hexagon_M2_mmaculs_s1>;
433 def : T_PPP_pat <M2_mmaculs_s0, int_hexagon_M2_mmaculs_s0>;
434 def : T_PPP_pat <M2_mmaculs_rs1, int_hexagon_M2_mmaculs_rs1>;
435 def : T_PPP_pat <M2_mmaculs_rs0, int_hexagon_M2_mmaculs_rs0>;
436 def : T_PPP_pat <M2_mmacuhs_s1, int_hexagon_M2_mmacuhs_s1>;
437 def : T_PPP_pat <M2_mmacuhs_s0, int_hexagon_M2_mmacuhs_s0>;
438 def : T_PPP_pat <M2_mmacuhs_rs1, int_hexagon_M2_mmacuhs_rs1>;
439 def : T_PPP_pat <M2_mmacuhs_rs0, int_hexagon_M2_mmacuhs_rs0>;
443 def : T_PPP_pat <M2_vmac2es, int_hexagon_M2_vmac2es>;
444 def : T_PPP_pat <M2_vmac2es_s1, int_hexagon_M2_vmac2es_s1>;
445 def : T_PPP_pat <M2_vmac2es_s0, int_hexagon_M2_vmac2es_s0>;
449 def : T_PPP_pat <M2_vdmacs_s1, int_hexagon_M2_vdmacs_s1>;
450 def : T_PPP_pat <M2_vdmacs_s0, int_hexagon_M2_vdmacs_s0>;
454 def : T_PPP_pat <M2_vcmac_s0_sat_r, int_hexagon_M2_vcmac_s0_sat_r>;
455 def : T_PPP_pat <M2_vcmac_s0_sat_i, int_hexagon_M2_vcmac_s0_sat_i>;
466 def : T_RR_pat <A2_addh_l16_ll, int_hexagon_A2_addh_l16_ll>;
467 def : T_RR_pat <A2_addh_l16_hl, int_hexagon_A2_addh_l16_hl>;
470 def : T_RR_pat <A2_addh_l16_sat_ll, int_hexagon_A2_addh_l16_sat_ll>;
471 def : T_RR_pat <A2_addh_l16_sat_hl, int_hexagon_A2_addh_l16_sat_hl>;
474 def : T_RR_pat <A2_subh_l16_ll, int_hexagon_A2_subh_l16_ll>;
475 def : T_RR_pat <A2_subh_l16_hl, int_hexagon_A2_subh_l16_hl>;
478 def : T_RR_pat <A2_subh_l16_sat_ll, int_hexagon_A2_subh_l16_sat_ll>;
479 def : T_RR_pat <A2_subh_l16_sat_hl, int_hexagon_A2_subh_l16_sat_hl>;
482 def : T_RR_pat <A2_addh_h16_ll, int_hexagon_A2_addh_h16_ll>;
483 def : T_RR_pat <A2_addh_h16_lh, int_hexagon_A2_addh_h16_lh>;
484 def : T_RR_pat <A2_addh_h16_hl, int_hexagon_A2_addh_h16_hl>;
485 def : T_RR_pat <A2_addh_h16_hh, int_hexagon_A2_addh_h16_hh>;
488 def : T_RR_pat <A2_subh_h16_ll, int_hexagon_A2_subh_h16_ll>;
489 def : T_RR_pat <A2_subh_h16_lh, int_hexagon_A2_subh_h16_lh>;
490 def : T_RR_pat <A2_subh_h16_hl, int_hexagon_A2_subh_h16_hl>;
491 def : T_RR_pat <A2_subh_h16_hh, int_hexagon_A2_subh_h16_hh>;
494 def : T_RR_pat <A2_addh_h16_sat_ll, int_hexagon_A2_addh_h16_sat_ll>;
495 def : T_RR_pat <A2_addh_h16_sat_lh, int_hexagon_A2_addh_h16_sat_lh>;
496 def : T_RR_pat <A2_addh_h16_sat_hl, int_hexagon_A2_addh_h16_sat_hl>;
497 def : T_RR_pat <A2_addh_h16_sat_hh, int_hexagon_A2_addh_h16_sat_hh>;
500 def : T_RR_pat <A2_subh_h16_sat_ll, int_hexagon_A2_subh_h16_sat_ll>;
501 def : T_RR_pat <A2_subh_h16_sat_lh, int_hexagon_A2_subh_h16_sat_lh>;
502 def : T_RR_pat <A2_subh_h16_sat_hl, int_hexagon_A2_subh_h16_sat_hl>;
503 def : T_RR_pat <A2_subh_h16_sat_hh, int_hexagon_A2_subh_h16_sat_hh>;
506 def : T_RR_pat<A2_max, int_hexagon_A2_max>;
507 def : T_RR_pat<A2_min, int_hexagon_A2_min>;
508 def : T_RR_pat<A2_maxu, int_hexagon_A2_maxu>;
509 def : T_RR_pat<A2_minu, int_hexagon_A2_minu>;
512 def : T_RRI_pat <S2_asr_i_r_nac, int_hexagon_S2_asr_i_r_nac>;
513 def : T_RRI_pat <S2_lsr_i_r_nac, int_hexagon_S2_lsr_i_r_nac>;
514 def : T_RRI_pat <S2_asl_i_r_nac, int_hexagon_S2_asl_i_r_nac>;
515 def : T_RRI_pat <S2_asr_i_r_acc, int_hexagon_S2_asr_i_r_acc>;
516 def : T_RRI_pat <S2_lsr_i_r_acc, int_hexagon_S2_lsr_i_r_acc>;
517 def : T_RRI_pat <S2_asl_i_r_acc, int_hexagon_S2_asl_i_r_acc>;
519 def : T_RRI_pat <S2_asr_i_r_and, int_hexagon_S2_asr_i_r_and>;
520 def : T_RRI_pat <S2_lsr_i_r_and, int_hexagon_S2_lsr_i_r_and>;
521 def : T_RRI_pat <S2_asl_i_r_and, int_hexagon_S2_asl_i_r_and>;
522 def : T_RRI_pat <S2_asr_i_r_or, int_hexagon_S2_asr_i_r_or>;
523 def : T_RRI_pat <S2_lsr_i_r_or, int_hexagon_S2_lsr_i_r_or>;
524 def : T_RRI_pat <S2_asl_i_r_or, int_hexagon_S2_asl_i_r_or>;
525 def : T_RRI_pat <S2_lsr_i_r_xacc, int_hexagon_S2_lsr_i_r_xacc>;
526 def : T_RRI_pat <S2_asl_i_r_xacc, int_hexagon_S2_asl_i_r_xacc>;
528 def : T_PPI_pat <S2_asr_i_p_nac, int_hexagon_S2_asr_i_p_nac>;
529 def : T_PPI_pat <S2_lsr_i_p_nac, int_hexagon_S2_lsr_i_p_nac>;
530 def : T_PPI_pat <S2_asl_i_p_nac, int_hexagon_S2_asl_i_p_nac>;
531 def : T_PPI_pat <S2_asr_i_p_acc, int_hexagon_S2_asr_i_p_acc>;
532 def : T_PPI_pat <S2_lsr_i_p_acc, int_hexagon_S2_lsr_i_p_acc>;
533 def : T_PPI_pat <S2_asl_i_p_acc, int_hexagon_S2_asl_i_p_acc>;
535 def : T_PPI_pat <S2_asr_i_p_and, int_hexagon_S2_asr_i_p_and>;
536 def : T_PPI_pat <S2_lsr_i_p_and, int_hexagon_S2_lsr_i_p_and>;
537 def : T_PPI_pat <S2_asl_i_p_and, int_hexagon_S2_asl_i_p_and>;
538 def : T_PPI_pat <S2_asr_i_p_or, int_hexagon_S2_asr_i_p_or>;
539 def : T_PPI_pat <S2_lsr_i_p_or, int_hexagon_S2_lsr_i_p_or>;
540 def : T_PPI_pat <S2_asl_i_p_or, int_hexagon_S2_asl_i_p_or>;
541 def : T_PPI_pat <S2_lsr_i_p_xacc, int_hexagon_S2_lsr_i_p_xacc>;
542 def : T_PPI_pat <S2_asl_i_p_xacc, int_hexagon_S2_asl_i_p_xacc>;
544 def : T_RRR_pat <S2_asr_r_r_nac, int_hexagon_S2_asr_r_r_nac>;
545 def : T_RRR_pat <S2_lsr_r_r_nac, int_hexagon_S2_lsr_r_r_nac>;
546 def : T_RRR_pat <S2_asl_r_r_nac, int_hexagon_S2_asl_r_r_nac>;
547 def : T_RRR_pat <S2_lsl_r_r_nac, int_hexagon_S2_lsl_r_r_nac>;
548 def : T_RRR_pat <S2_asr_r_r_acc, int_hexagon_S2_asr_r_r_acc>;
549 def : T_RRR_pat <S2_lsr_r_r_acc, int_hexagon_S2_lsr_r_r_acc>;
550 def : T_RRR_pat <S2_asl_r_r_acc, int_hexagon_S2_asl_r_r_acc>;
551 def : T_RRR_pat <S2_lsl_r_r_acc, int_hexagon_S2_lsl_r_r_acc>;
553 def : T_RRR_pat <S2_asr_r_r_and, int_hexagon_S2_asr_r_r_and>;
554 def : T_RRR_pat <S2_lsr_r_r_and, int_hexagon_S2_lsr_r_r_and>;
555 def : T_RRR_pat <S2_asl_r_r_and, int_hexagon_S2_asl_r_r_and>;
556 def : T_RRR_pat <S2_lsl_r_r_and, int_hexagon_S2_lsl_r_r_and>;
557 def : T_RRR_pat <S2_asr_r_r_or, int_hexagon_S2_asr_r_r_or>;
558 def : T_RRR_pat <S2_lsr_r_r_or, int_hexagon_S2_lsr_r_r_or>;
559 def : T_RRR_pat <S2_asl_r_r_or, int_hexagon_S2_asl_r_r_or>;
560 def : T_RRR_pat <S2_lsl_r_r_or, int_hexagon_S2_lsl_r_r_or>;
562 def : T_PPR_pat <S2_asr_r_p_nac, int_hexagon_S2_asr_r_p_nac>;
563 def : T_PPR_pat <S2_lsr_r_p_nac, int_hexagon_S2_lsr_r_p_nac>;
564 def : T_PPR_pat <S2_asl_r_p_nac, int_hexagon_S2_asl_r_p_nac>;
565 def : T_PPR_pat <S2_lsl_r_p_nac, int_hexagon_S2_lsl_r_p_nac>;
566 def : T_PPR_pat <S2_asr_r_p_acc, int_hexagon_S2_asr_r_p_acc>;
567 def : T_PPR_pat <S2_lsr_r_p_acc, int_hexagon_S2_lsr_r_p_acc>;
568 def : T_PPR_pat <S2_asl_r_p_acc, int_hexagon_S2_asl_r_p_acc>;
569 def : T_PPR_pat <S2_lsl_r_p_acc, int_hexagon_S2_lsl_r_p_acc>;
571 def : T_PPR_pat <S2_asr_r_p_and, int_hexagon_S2_asr_r_p_and>;
572 def : T_PPR_pat <S2_lsr_r_p_and, int_hexagon_S2_lsr_r_p_and>;
573 def : T_PPR_pat <S2_asl_r_p_and, int_hexagon_S2_asl_r_p_and>;
574 def : T_PPR_pat <S2_lsl_r_p_and, int_hexagon_S2_lsl_r_p_and>;
575 def : T_PPR_pat <S2_asr_r_p_or, int_hexagon_S2_asr_r_p_or>;
576 def : T_PPR_pat <S2_lsr_r_p_or, int_hexagon_S2_lsr_r_p_or>;
577 def : T_PPR_pat <S2_asl_r_p_or, int_hexagon_S2_asl_r_p_or>;
578 def : T_PPR_pat <S2_lsl_r_p_or, int_hexagon_S2_lsl_r_p_or>;
580 def : T_RRI_pat <S2_asr_i_r_nac, int_hexagon_S2_asr_i_r_nac>;
581 def : T_RRI_pat <S2_lsr_i_r_nac, int_hexagon_S2_lsr_i_r_nac>;
582 def : T_RRI_pat <S2_asl_i_r_nac, int_hexagon_S2_asl_i_r_nac>;
583 def : T_RRI_pat <S2_asr_i_r_acc, int_hexagon_S2_asr_i_r_acc>;
584 def : T_RRI_pat <S2_lsr_i_r_acc, int_hexagon_S2_lsr_i_r_acc>;
585 def : T_RRI_pat <S2_asl_i_r_acc, int_hexagon_S2_asl_i_r_acc>;
587 def : T_RRI_pat <S2_asr_i_r_and, int_hexagon_S2_asr_i_r_and>;
588 def : T_RRI_pat <S2_lsr_i_r_and, int_hexagon_S2_lsr_i_r_and>;
589 def : T_RRI_pat <S2_asl_i_r_and, int_hexagon_S2_asl_i_r_and>;
590 def : T_RRI_pat <S2_asr_i_r_or, int_hexagon_S2_asr_i_r_or>;
591 def : T_RRI_pat <S2_lsr_i_r_or, int_hexagon_S2_lsr_i_r_or>;
592 def : T_RRI_pat <S2_asl_i_r_or, int_hexagon_S2_asl_i_r_or>;
593 def : T_RRI_pat <S2_lsr_i_r_xacc, int_hexagon_S2_lsr_i_r_xacc>;
594 def : T_RRI_pat <S2_asl_i_r_xacc, int_hexagon_S2_asl_i_r_xacc>;
596 def : T_PPI_pat <S2_asr_i_p_nac, int_hexagon_S2_asr_i_p_nac>;
597 def : T_PPI_pat <S2_lsr_i_p_nac, int_hexagon_S2_lsr_i_p_nac>;
598 def : T_PPI_pat <S2_asl_i_p_nac, int_hexagon_S2_asl_i_p_nac>;
599 def : T_PPI_pat <S2_asr_i_p_acc, int_hexagon_S2_asr_i_p_acc>;
600 def : T_PPI_pat <S2_lsr_i_p_acc, int_hexagon_S2_lsr_i_p_acc>;
601 def : T_PPI_pat <S2_asl_i_p_acc, int_hexagon_S2_asl_i_p_acc>;
603 def : T_PPI_pat <S2_asr_i_p_and, int_hexagon_S2_asr_i_p_and>;
604 def : T_PPI_pat <S2_lsr_i_p_and, int_hexagon_S2_lsr_i_p_and>;
605 def : T_PPI_pat <S2_asl_i_p_and, int_hexagon_S2_asl_i_p_and>;
606 def : T_PPI_pat <S2_asr_i_p_or, int_hexagon_S2_asr_i_p_or>;
607 def : T_PPI_pat <S2_lsr_i_p_or, int_hexagon_S2_lsr_i_p_or>;
608 def : T_PPI_pat <S2_asl_i_p_or, int_hexagon_S2_asl_i_p_or>;
609 def : T_PPI_pat <S2_lsr_i_p_xacc, int_hexagon_S2_lsr_i_p_xacc>;
610 def : T_PPI_pat <S2_asl_i_p_xacc, int_hexagon_S2_asl_i_p_xacc>;
612 def : T_RRR_pat <S2_asr_r_r_nac, int_hexagon_S2_asr_r_r_nac>;
613 def : T_RRR_pat <S2_lsr_r_r_nac, int_hexagon_S2_lsr_r_r_nac>;
614 def : T_RRR_pat <S2_asl_r_r_nac, int_hexagon_S2_asl_r_r_nac>;
615 def : T_RRR_pat <S2_lsl_r_r_nac, int_hexagon_S2_lsl_r_r_nac>;
616 def : T_RRR_pat <S2_asr_r_r_acc, int_hexagon_S2_asr_r_r_acc>;
617 def : T_RRR_pat <S2_lsr_r_r_acc, int_hexagon_S2_lsr_r_r_acc>;
618 def : T_RRR_pat <S2_asl_r_r_acc, int_hexagon_S2_asl_r_r_acc>;
619 def : T_RRR_pat <S2_lsl_r_r_acc, int_hexagon_S2_lsl_r_r_acc>;
621 def : T_RRR_pat <S2_asr_r_r_and, int_hexagon_S2_asr_r_r_and>;
622 def : T_RRR_pat <S2_lsr_r_r_and, int_hexagon_S2_lsr_r_r_and>;
623 def : T_RRR_pat <S2_asl_r_r_and, int_hexagon_S2_asl_r_r_and>;
624 def : T_RRR_pat <S2_lsl_r_r_and, int_hexagon_S2_lsl_r_r_and>;
625 def : T_RRR_pat <S2_asr_r_r_or, int_hexagon_S2_asr_r_r_or>;
626 def : T_RRR_pat <S2_lsr_r_r_or, int_hexagon_S2_lsr_r_r_or>;
627 def : T_RRR_pat <S2_asl_r_r_or, int_hexagon_S2_asl_r_r_or>;
628 def : T_RRR_pat <S2_lsl_r_r_or, int_hexagon_S2_lsl_r_r_or>;
630 def : T_PPR_pat <S2_asr_r_p_nac, int_hexagon_S2_asr_r_p_nac>;
631 def : T_PPR_pat <S2_lsr_r_p_nac, int_hexagon_S2_lsr_r_p_nac>;
632 def : T_PPR_pat <S2_asl_r_p_nac, int_hexagon_S2_asl_r_p_nac>;
633 def : T_PPR_pat <S2_lsl_r_p_nac, int_hexagon_S2_lsl_r_p_nac>;
634 def : T_PPR_pat <S2_asr_r_p_acc, int_hexagon_S2_asr_r_p_acc>;
635 def : T_PPR_pat <S2_lsr_r_p_acc, int_hexagon_S2_lsr_r_p_acc>;
636 def : T_PPR_pat <S2_asl_r_p_acc, int_hexagon_S2_asl_r_p_acc>;
637 def : T_PPR_pat <S2_lsl_r_p_acc, int_hexagon_S2_lsl_r_p_acc>;
639 def : T_PPR_pat <S2_asr_r_p_and, int_hexagon_S2_asr_r_p_and>;
640 def : T_PPR_pat <S2_lsr_r_p_and, int_hexagon_S2_lsr_r_p_and>;
641 def : T_PPR_pat <S2_asl_r_p_and, int_hexagon_S2_asl_r_p_and>;
642 def : T_PPR_pat <S2_lsl_r_p_and, int_hexagon_S2_lsl_r_p_and>;
643 def : T_PPR_pat <S2_asr_r_p_or, int_hexagon_S2_asr_r_p_or>;
644 def : T_PPR_pat <S2_lsr_r_p_or, int_hexagon_S2_lsr_r_p_or>;
645 def : T_PPR_pat <S2_asl_r_p_or, int_hexagon_S2_asl_r_p_or>;
646 def : T_PPR_pat <S2_lsl_r_p_or, int_hexagon_S2_lsl_r_p_or>;
651 def : T_RR_pat<A2_add, int_hexagon_A2_add>;
652 def : T_RI_pat<A2_addi, int_hexagon_A2_addi>;
653 def : T_RR_pat<A2_sub, int_hexagon_A2_sub>;
654 def : T_IR_pat<A2_subri, int_hexagon_A2_subri>;
655 def : T_RR_pat<A2_and, int_hexagon_A2_and>;
656 def : T_RI_pat<A2_andir, int_hexagon_A2_andir>;
657 def : T_RR_pat<A2_or, int_hexagon_A2_or>;
658 def : T_RI_pat<A2_orir, int_hexagon_A2_orir>;
659 def : T_RR_pat<A2_xor, int_hexagon_A2_xor>;
660 def : T_RR_pat<A2_combinew, int_hexagon_A2_combinew>;
663 def : Pat <(int_hexagon_A2_not (I32:$Rs)),
667 def : Pat <(int_hexagon_A2_neg IntRegs:$Rs),
671 def : Pat <(int_hexagon_A2_tfril (I32:$Rs), u16_0ImmPred:$Is),
673 def : Pat <(int_hexagon_A2_tfrih (I32:$Rs), u16_0ImmPred:$Is),
677 def : T_R_pat <A2_tfr, int_hexagon_A2_tfr>;
678 def : T_I_pat <A2_tfrsi, int_hexagon_A2_tfrsi>;
679 def : T_I_pat <A2_tfrpi, int_hexagon_A2_tfrpi>;
682 def : Pat<(int_hexagon_A2_tfrp DoubleRegs:$src),
689 def: T_RR_pat<A2_combine_hh, int_hexagon_A2_combine_hh>;
690 def: T_RR_pat<A2_combine_hl, int_hexagon_A2_combine_hl>;
691 def: T_RR_pat<A2_combine_lh, int_hexagon_A2_combine_lh>;
692 def: T_RR_pat<A2_combine_ll, int_hexagon_A2_combine_ll>;
694 def: T_II_pat<A2_combineii, int_hexagon_A2_combineii, s32ImmPred, s8ImmPred>;
696 def: Pat<(i32 (int_hexagon_C2_mux (I32:$Rp), (I32:$Rs), (I32:$Rt))),
700 def : T_QRI_pat<C2_muxir, int_hexagon_C2_muxir, s32ImmPred>;
701 def : T_QIR_pat<C2_muxri, int_hexagon_C2_muxri, s32ImmPred>;
702 def : T_QII_pat<C2_muxii, int_hexagon_C2_muxii, s32ImmPred, s8ImmPred>;
705 def : T_R_pat<A2_aslh, int_hexagon_A2_aslh>;
706 def : T_R_pat<A2_asrh, int_hexagon_A2_asrh>;
707 def : T_R_pat<A2_asrh, int_hexagon_SI_to_SXTHI_asrh>;
710 def : T_R_pat<A2_sxth, int_hexagon_A2_sxth>;
711 def : T_R_pat<A2_sxtb, int_hexagon_A2_sxtb>;
712 def : T_R_pat<A2_zxth, int_hexagon_A2_zxth>;
713 def : T_R_pat<A2_zxtb, int_hexagon_A2_zxtb>;
719 def : T_RR_pat<C2_cmpeq, int_hexagon_C2_cmpeq>;
720 def : T_RR_pat<C2_cmpgt, int_hexagon_C2_cmpgt>;
721 def : T_RR_pat<C2_cmpgtu, int_hexagon_C2_cmpgtu>;
723 def : T_RI_pat<C2_cmpeqi, int_hexagon_C2_cmpeqi, s32ImmPred>;
724 def : T_RI_pat<C2_cmpgti, int_hexagon_C2_cmpgti, s32ImmPred>;
725 def : T_RI_pat<C2_cmpgtui, int_hexagon_C2_cmpgtui, u32ImmPred>;
727 def : Pat <(i32 (int_hexagon_C2_cmpgei (I32:$src1), s32ImmPred:$src2)),
731 def : Pat <(i32 (int_hexagon_C2_cmpgeui (I32:$src1), u32ImmPred:$src2)),
736 def : Pat <(i32 (int_hexagon_C2_cmpgeui (I32:$src1), 0)),
739 def : Pat <(i32 (int_hexagon_C2_cmplt (I32:$src1),
743 def : Pat <(i32 (int_hexagon_C2_cmpltu (I32:$src1),
751 def: T_RR_pat<A2_svaddh, int_hexagon_A2_svaddh>;
752 def: T_RR_pat<A2_svaddhs, int_hexagon_A2_svaddhs>;
753 def: T_RR_pat<A2_svadduhs, int_hexagon_A2_svadduhs>;
755 def: T_RR_pat<A2_svsubh, int_hexagon_A2_svsubh>;
756 def: T_RR_pat<A2_svsubhs, int_hexagon_A2_svsubhs>;
757 def: T_RR_pat<A2_svsubuhs, int_hexagon_A2_svsubuhs>;
759 def: T_RR_pat<A2_svavgh, int_hexagon_A2_svavgh>;
760 def: T_RR_pat<A2_svavghs, int_hexagon_A2_svavghs>;
761 def: T_RR_pat<A2_svnavgh, int_hexagon_A2_svnavgh>;
766 def: T_RR_pat<A2_addsat, int_hexagon_A2_addsat>;
767 def: T_RR_pat<A2_subsat, int_hexagon_A2_subsat>;
768 def: T_PP_pat<A2_addp, int_hexagon_A2_addp>;
769 def: T_PP_pat<A2_subp, int_hexagon_A2_subp>;
771 def: T_PP_pat<A2_andp, int_hexagon_A2_andp>;
772 def: T_PP_pat<A2_orp, int_hexagon_A2_orp>;
773 def: T_PP_pat<A2_xorp, int_hexagon_A2_xorp>;
775 def: T_PP_pat<C2_cmpeqp, int_hexagon_C2_cmpeqp>;
776 def: T_PP_pat<C2_cmpgtp, int_hexagon_C2_cmpgtp>;
777 def: T_PP_pat<C2_cmpgtup, int_hexagon_C2_cmpgtup>;
779 def: T_PP_pat<S2_parityp, int_hexagon_S2_parityp>;
780 def: T_RR_pat<S2_packhl, int_hexagon_S2_packhl>;
786 def : T_PP_pat <A2_vaddub, int_hexagon_A2_vaddub>;
787 def : T_PP_pat <A2_vaddubs, int_hexagon_A2_vaddubs>;
788 def : T_PP_pat <A2_vaddh, int_hexagon_A2_vaddh>;
789 def : T_PP_pat <A2_vaddhs, int_hexagon_A2_vaddhs>;
790 def : T_PP_pat <A2_vadduhs, int_hexagon_A2_vadduhs>;
791 def : T_PP_pat <A2_vaddw, int_hexagon_A2_vaddw>;
792 def : T_PP_pat <A2_vaddws, int_hexagon_A2_vaddws>;
795 def : T_PP_pat <A2_vavgub, int_hexagon_A2_vavgub>;
796 def : T_PP_pat <A2_vavgubr, int_hexagon_A2_vavgubr>;
797 def : T_PP_pat <A2_vavgh, int_hexagon_A2_vavgh>;
798 def : T_PP_pat <A2_vavghr, int_hexagon_A2_vavghr>;
799 def : T_PP_pat <A2_vavghcr, int_hexagon_A2_vavghcr>;
800 def : T_PP_pat <A2_vavguh, int_hexagon_A2_vavguh>;
801 def : T_PP_pat <A2_vavguhr, int_hexagon_A2_vavguhr>;
803 def : T_PP_pat <A2_vavgw, int_hexagon_A2_vavgw>;
804 def : T_PP_pat <A2_vavgwr, int_hexagon_A2_vavgwr>;
805 def : T_PP_pat <A2_vavgwcr, int_hexagon_A2_vavgwcr>;
806 def : T_PP_pat <A2_vavguw, int_hexagon_A2_vavguw>;
807 def : T_PP_pat <A2_vavguwr, int_hexagon_A2_vavguwr>;
810 def : T_PP_pat <A2_vnavgh, int_hexagon_A2_vnavgh>;
811 def : T_PP_pat <A2_vnavghr, int_hexagon_A2_vnavghr>;
812 def : T_PP_pat <A2_vnavghcr, int_hexagon_A2_vnavghcr>;
813 def : T_PP_pat <A2_vnavgw, int_hexagon_A2_vnavgw>;
814 def : T_PP_pat <A2_vnavgwr, int_hexagon_A2_vnavgwr>;
815 def : T_PP_pat <A2_vnavgwcr, int_hexagon_A2_vnavgwcr>;
818 def : T_PP_pat <A2_vmaxh, int_hexagon_A2_vmaxh>;
819 def : T_PP_pat <A2_vmaxw, int_hexagon_A2_vmaxw>;
820 def : T_PP_pat <A2_vmaxub, int_hexagon_A2_vmaxub>;
821 def : T_PP_pat <A2_vmaxuh, int_hexagon_A2_vmaxuh>;
822 def : T_PP_pat <A2_vmaxuw, int_hexagon_A2_vmaxuw>;
825 def : T_PP_pat <A2_vminh, int_hexagon_A2_vminh>;
826 def : T_PP_pat <A2_vminw, int_hexagon_A2_vminw>;
827 def : T_PP_pat <A2_vminub, int_hexagon_A2_vminub>;
828 def : T_PP_pat <A2_vminuh, int_hexagon_A2_vminuh>;
829 def : T_PP_pat <A2_vminuw, int_hexagon_A2_vminuw>;
832 def : T_PP_pat <A2_vsubub, int_hexagon_A2_vsubub>;
833 def : T_PP_pat <A2_vsububs, int_hexagon_A2_vsububs>;
834 def : T_PP_pat <A2_vsubh, int_hexagon_A2_vsubh>;
835 def : T_PP_pat <A2_vsubhs, int_hexagon_A2_vsubhs>;
836 def : T_PP_pat <A2_vsubuhs, int_hexagon_A2_vsubuhs>;
837 def : T_PP_pat <A2_vsubw, int_hexagon_A2_vsubw>;
838 def : T_PP_pat <A2_vsubws, int_hexagon_A2_vsubws>;
841 def : T_PP_pat <A2_vcmpbeq, int_hexagon_A2_vcmpbeq>;
842 def : T_PP_pat <A4_vcmpbgt, int_hexagon_A4_vcmpbgt>;
843 def : T_PP_pat <A2_vcmpbgtu, int_hexagon_A2_vcmpbgtu>;
846 def : T_PP_pat <A2_vcmpheq, int_hexagon_A2_vcmpheq>;
847 def : T_PP_pat <A2_vcmphgt, int_hexagon_A2_vcmphgt>;
848 def : T_PP_pat <A2_vcmphgtu, int_hexagon_A2_vcmphgtu>;
851 def : T_PP_pat <A2_vcmpweq, int_hexagon_A2_vcmpweq>;
852 def : T_PP_pat <A2_vcmpwgt, int_hexagon_A2_vcmpwgt>;
853 def : T_PP_pat <A2_vcmpwgtu, int_hexagon_A2_vcmpwgtu>;
856 def : Pat<(int_hexagon_C2_vmux PredRegs:$Pu, DoubleRegs:$Rs, DoubleRegs:$Rt),
861 def : T_RR_pat <M2_dpmpyss_s0, int_hexagon_M2_dpmpyss_s0>;
862 def : T_RR_pat <M2_dpmpyuu_s0, int_hexagon_M2_dpmpyuu_s0>;
865 def : T_RR_pat <M2_cmpyi_s0, int_hexagon_M2_cmpyi_s0>;
866 def : T_RR_pat <M2_cmpyr_s0, int_hexagon_M2_cmpyr_s0>;
869 def : T_RR_pat <M2_cmpys_s0, int_hexagon_M2_cmpys_s0>;
870 def : T_RR_pat <M2_cmpysc_s0, int_hexagon_M2_cmpysc_s0>;
871 def : T_RR_pat <M2_cmpys_s1, int_hexagon_M2_cmpys_s1>;
872 def : T_RR_pat <M2_cmpysc_s1, int_hexagon_M2_cmpysc_s1>;
876 def : T_RR_pat <M2_vmpy2s_s0, int_hexagon_M2_vmpy2s_s0>;
877 def : T_RR_pat <M2_vmpy2s_s1, int_hexagon_M2_vmpy2s_s1>;
880 def : T_PRR_pat <M2_dpmpyss_acc_s0, int_hexagon_M2_dpmpyss_acc_s0>;
881 def : T_PRR_pat <M2_dpmpyss_nac_s0, int_hexagon_M2_dpmpyss_nac_s0>;
882 def : T_PRR_pat <M2_dpmpyuu_acc_s0, int_hexagon_M2_dpmpyuu_acc_s0>;
883 def : T_PRR_pat <M2_dpmpyuu_nac_s0, int_hexagon_M2_dpmpyuu_nac_s0>;
886 def : T_PRR_pat <M2_cmacs_s0, int_hexagon_M2_cmacs_s0>;
887 def : T_PRR_pat <M2_cnacs_s0, int_hexagon_M2_cnacs_s0>;
888 def : T_PRR_pat <M2_cmacs_s1, int_hexagon_M2_cmacs_s1>;
889 def : T_PRR_pat <M2_cnacs_s1, int_hexagon_M2_cnacs_s1>;
892 def : T_PRR_pat <M2_cmacsc_s0, int_hexagon_M2_cmacsc_s0>;
893 def : T_PRR_pat <M2_cnacsc_s0, int_hexagon_M2_cnacsc_s0>;
894 def : T_PRR_pat <M2_cmacsc_s1, int_hexagon_M2_cmacsc_s1>;
895 def : T_PRR_pat <M2_cnacsc_s1, int_hexagon_M2_cnacsc_s1>;
898 def : T_PRR_pat <M2_cmaci_s0, int_hexagon_M2_cmaci_s0>;
899 def : T_PRR_pat <M2_cmacr_s0, int_hexagon_M2_cmacr_s0>;
902 def : T_PRR_pat <M2_vmac2, int_hexagon_M2_vmac2>;
903 def : T_PRR_pat <M2_vmac2s_s0, int_hexagon_M2_vmac2s_s0>;
904 def : T_PRR_pat <M2_vmac2s_s1, int_hexagon_M2_vmac2s_s1>;
917 def: qi_CRInst_qi_pat<C2_not, int_hexagon_C2_not>;
918 def: qi_CRInst_qi_pat<C2_all8, int_hexagon_C2_all8>;
919 def: qi_CRInst_qi_pat<C2_any8, int_hexagon_C2_any8>;
921 def: qi_CRInst_qiqi_pat<C2_and, int_hexagon_C2_and>;
922 def: qi_CRInst_qiqi_pat<C2_andn, int_hexagon_C2_andn>;
923 def: qi_CRInst_qiqi_pat<C2_or, int_hexagon_C2_or>;
924 def: qi_CRInst_qiqi_pat<C2_orn, int_hexagon_C2_orn>;
925 def: qi_CRInst_qiqi_pat<C2_xor, int_hexagon_C2_xor>;
928 def : Pat<(int_hexagon_C2_pxfer_map PredRegs:$src),
932 def : T_RRI_pat <M2_macsip, int_hexagon_M2_macsip>;
933 def : T_RRI_pat <M2_macsin, int_hexagon_M2_macsin>;
934 def : T_RRR_pat <M2_maci, int_hexagon_M2_maci>;
937 def : T_RRR_pat <M2_subacc, int_hexagon_M2_subacc>;
940 def : T_RRR_pat <M2_acci, int_hexagon_M2_acci>;
941 def : T_RRR_pat <M2_nacci, int_hexagon_M2_nacci>;
942 def : T_RRI_pat <M2_accii, int_hexagon_M2_accii>;
943 def : T_RRI_pat <M2_naccii, int_hexagon_M2_naccii>;
946 def : T_RRR_pat <M2_xor_xacc, int_hexagon_M2_xor_xacc>;
954 def : Pat <(int_hexagon_M2_vdmpyrs_s0 DoubleRegs:$src1, DoubleRegs:$src2),
957 def : Pat <(int_hexagon_M2_vdmpyrs_s1 DoubleRegs:$src1, DoubleRegs:$src2),
962 def : MType_R32_pat <int_hexagon_M2_vmpy2s_s0pack, M2_vmpy2s_s0pack>;
963 def : MType_R32_pat <int_hexagon_M2_vmpy2s_s1pack, M2_vmpy2s_s1pack>;
966 def : MType_R32_pat <int_hexagon_M2_mpyi, M2_mpyi>;
967 def : T_RI_pat<M2_mpysmi, int_hexagon_M2_mpysmi>;
970 def : MType_R32_pat <int_hexagon_M2_mpyui, M2_mpyi>;
973 def : MType_R32_pat <int_hexagon_M2_mpy_up, M2_mpy_up>;
974 def : MType_R32_pat <int_hexagon_M2_mpyu_up, M2_mpyu_up>;
975 def : MType_R32_pat <int_hexagon_M2_hmmpyh_rs1, M2_hmmpyh_rs1>;
976 def : MType_R32_pat <int_hexagon_M2_hmmpyl_rs1, M2_hmmpyl_rs1>;
977 def : MType_R32_pat <int_hexagon_M2_dpmpyss_rnd_s0, M2_dpmpyss_rnd_s0>;
981 def : MType_R32_pat <int_hexagon_M2_cmpyrs_s0, M2_cmpyrs_s0>;
982 def : MType_R32_pat <int_hexagon_M2_cmpyrs_s1, M2_cmpyrs_s1>;
983 def : MType_R32_pat <int_hexagon_M2_cmpyrsc_s0, M2_cmpyrsc_s0>;
984 def : MType_R32_pat <int_hexagon_M2_cmpyrsc_s1, M2_cmpyrsc_s1>;
989 def : T_P_pat <A2_absp, int_hexagon_A2_absp>;
990 def : T_P_pat <A2_negp, int_hexagon_A2_negp>;
991 def : T_P_pat <A2_notp, int_hexagon_A2_notp>;
998 def: T_R_pat<S2_cl0, int_hexagon_S2_cl0>;
999 def: T_P_pat<S2_cl0p, int_hexagon_S2_cl0p>;
1000 def: T_R_pat<S2_cl1, int_hexagon_S2_cl1>;
1001 def: T_P_pat<S2_cl1p, int_hexagon_S2_cl1p>;
1002 def: T_R_pat<S2_clb, int_hexagon_S2_clb>;
1003 def: T_P_pat<S2_clbp, int_hexagon_S2_clbp>;
1004 def: T_R_pat<S2_clbnorm, int_hexagon_S2_clbnorm>;
1005 def: T_R_pat<S2_ct0, int_hexagon_S2_ct0>;
1006 def: T_R_pat<S2_ct1, int_hexagon_S2_ct1>;
1009 def: T_RR_pat<C2_bitsclr, int_hexagon_C2_bitsclr>;
1010 def: T_RI_pat<C2_bitsclri, int_hexagon_C2_bitsclri>;
1011 def: T_RR_pat<C2_bitsset, int_hexagon_C2_bitsset>;
1014 def : T_PP_pat <S2_shuffeb, int_hexagon_S2_shuffeb>;
1015 def : T_PP_pat <S2_shuffob, int_hexagon_S2_shuffob>;
1016 def : T_PP_pat <S2_shuffeh, int_hexagon_S2_shuffeh>;
1017 def : T_PP_pat <S2_shuffoh, int_hexagon_S2_shuffoh>;
1020 def : T_PP_pat <S2_vtrunewh, int_hexagon_S2_vtrunewh>;
1021 def : T_PP_pat <S2_vtrunowh, int_hexagon_S2_vtrunowh>;
1024 def : T_PP_pat <S2_lfsp, int_hexagon_S2_lfsp>;
1027 def : T_PPQ_pat <S2_vsplicerb, int_hexagon_S2_vsplicerb>;
1028 def : T_PPI_pat <S2_vspliceib, int_hexagon_S2_vspliceib>;
1031 def : T_RRI_pat<S2_addasl_rrri, int_hexagon_S2_addasl_rrri>;
1034 def : T_PII_pat<S2_extractup, int_hexagon_S2_extractup>;
1035 def : T_RII_pat<S2_extractu, int_hexagon_S2_extractu>;
1036 def : T_RP_pat <S2_extractu_rp, int_hexagon_S2_extractu_rp>;
1037 def : T_PP_pat <S2_extractup_rp, int_hexagon_S2_extractup_rp>;
1040 def : Pat <(int_hexagon_S2_insert_rp IntRegs:$src1, IntRegs:$src2,
1044 def : Pat<(i64 (int_hexagon_S2_insertp_rp (I64:$src1),
1049 def : Pat<(int_hexagon_S2_insert IntRegs:$src1, IntRegs:$src2,
1054 def : Pat<(i64 (int_hexagon_S2_insertp (I64:$src1),
1061 def : T_P_pat <S2_interleave, int_hexagon_S2_interleave>;
1062 def : T_P_pat <S2_deinterleave, int_hexagon_S2_deinterleave>;
1065 def: T_RI_pat<S2_setbit_i, int_hexagon_S2_setbit_i>;
1066 def: T_RI_pat<S2_clrbit_i, int_hexagon_S2_clrbit_i>;
1067 def: T_RI_pat<S2_togglebit_i, int_hexagon_S2_togglebit_i>;
1069 def: T_RR_pat<S2_setbit_r, int_hexagon_S2_setbit_r>;
1070 def: T_RR_pat<S2_clrbit_r, int_hexagon_S2_clrbit_r>;
1071 def: T_RR_pat<S2_togglebit_r, int_hexagon_S2_togglebit_r>;
1074 def: T_RI_pat<S2_tstbit_i, int_hexagon_S2_tstbit_i>;
1075 def: T_RR_pat<S2_tstbit_r, int_hexagon_S2_tstbit_r>;
1081 def : T_P_pat <A2_vconj, int_hexagon_A2_vconj>;
1084 def : T_PR_pat <S2_vcrotate, int_hexagon_S2_vcrotate>;
1091 def : T_P_pat <S2_vsathb_nopack, int_hexagon_S2_vsathb_nopack>;
1092 def : T_P_pat <S2_vsathub_nopack, int_hexagon_S2_vsathub_nopack>;
1093 def : T_P_pat <S2_vsatwh_nopack, int_hexagon_S2_vsatwh_nopack>;
1094 def : T_P_pat <S2_vsatwuh_nopack, int_hexagon_S2_vsatwuh_nopack>;
1101 def: Pat<(i32 (int_hexagon_C2_tfrpr (I32:$Rs))),
1103 def: Pat<(i32 (int_hexagon_C2_tfrrp (I32:$Rs))),
1107 def: Pat<(i64 (int_hexagon_C2_mask (I32:$Rs))),
1111 def: Pat<(i32 (int_hexagon_C2_vitpack (I32:$Rs), (I32:$Rt))),
1119 def : T_PI_pat <S2_asr_i_p, int_hexagon_S2_asr_i_p>;
1120 def : T_PI_pat <S2_lsr_i_p, int_hexagon_S2_lsr_i_p>;
1121 def : T_PI_pat <S2_asl_i_p, int_hexagon_S2_asl_i_p>;
1123 def : T_PR_pat <S2_asr_r_p, int_hexagon_S2_asr_r_p>;
1124 def : T_PR_pat <S2_lsr_r_p, int_hexagon_S2_lsr_r_p>;
1125 def : T_PR_pat <S2_asl_r_p, int_hexagon_S2_asl_r_p>;
1126 def : T_PR_pat <S2_lsl_r_p, int_hexagon_S2_lsl_r_p>;
1128 def : T_RR_pat <S2_asr_r_r, int_hexagon_S2_asr_r_r>;
1129 def : T_RR_pat <S2_lsr_r_r, int_hexagon_S2_lsr_r_r>;
1130 def : T_RR_pat <S2_asl_r_r, int_hexagon_S2_asl_r_r>;
1131 def : T_RR_pat <S2_lsl_r_r, int_hexagon_S2_lsl_r_r>;
1133 def : T_RR_pat <S2_asr_r_r_sat, int_hexagon_S2_asr_r_r_sat>;
1134 def : T_RR_pat <S2_asl_r_r_sat, int_hexagon_S2_asl_r_r_sat>;
1136 def : T_R_pat <S2_vsxtbh, int_hexagon_S2_vsxtbh>;
1137 def : T_R_pat <S2_vzxtbh, int_hexagon_S2_vzxtbh>;
1138 def : T_R_pat <S2_vsxthw, int_hexagon_S2_vsxthw>;
1139 def : T_R_pat <S2_vzxthw, int_hexagon_S2_vzxthw>;
1140 def : T_R_pat <S2_vsplatrh, int_hexagon_S2_vsplatrh>;
1141 def : T_R_pat <A2_sxtw, int_hexagon_A2_sxtw>;
1144 def : T_R_pat <S2_svsathb, int_hexagon_S2_svsathb>;
1145 def : T_R_pat <S2_svsathub, int_hexagon_S2_svsathub>;
1146 def : T_P_pat <S2_vsathub, int_hexagon_S2_vsathub>;
1147 def : T_P_pat <S2_vsatwh, int_hexagon_S2_vsatwh>;
1148 def : T_P_pat <S2_vsatwuh, int_hexagon_S2_vsatwuh>;
1149 def : T_P_pat <S2_vsathb, int_hexagon_S2_vsathb>;
1151 def : T_P_pat <S2_vtrunohb, int_hexagon_S2_vtrunohb>;
1152 def : T_P_pat <S2_vtrunehb, int_hexagon_S2_vtrunehb>;
1153 def : T_P_pat <S2_vrndpackwh, int_hexagon_S2_vrndpackwh>;
1154 def : T_P_pat <S2_vrndpackwhs, int_hexagon_S2_vrndpackwhs>;
1155 def : T_R_pat <S2_brev, int_hexagon_S2_brev>;
1156 def : T_R_pat <S2_vsplatrb, int_hexagon_S2_vsplatrb>;
1158 def : T_R_pat <A2_abs, int_hexagon_A2_abs>;
1159 def : T_R_pat <A2_abssat, int_hexagon_A2_abssat>;
1160 def : T_R_pat <A2_negsat, int_hexagon_A2_negsat>;
1162 def : T_R_pat <A2_swiz, int_hexagon_A2_swiz>;
1164 def : T_P_pat <A2_sat, int_hexagon_A2_sat>;
1165 def : T_R_pat <A2_sath, int_hexagon_A2_sath>;
1166 def : T_R_pat <A2_satuh, int_hexagon_A2_satuh>;
1167 def : T_R_pat <A2_satub, int_hexagon_A2_satub>;
1168 def : T_R_pat <A2_satb, int_hexagon_A2_satb>;
1171 def : T_PI_pat<S2_asr_i_svw_trun, int_hexagon_S2_asr_i_svw_trun>;
1173 def : T_RI_pat <S2_asr_i_r, int_hexagon_S2_asr_i_r>;
1174 def : T_RI_pat <S2_lsr_i_r, int_hexagon_S2_lsr_i_r>;
1175 def : T_RI_pat <S2_asl_i_r, int_hexagon_S2_asl_i_r>;
1176 def : T_RI_pat <S2_asr_i_r_rnd, int_hexagon_S2_asr_i_r_rnd>;
1177 def : T_RI_pat <S2_asr_i_r_rnd_goodsyntax,
1181 def : T_RI_pat <S2_asl_i_r_sat, int_hexagon_S2_asl_i_r_sat>;
1184 // Template 'def pat' to map tableidx[bhwd] intrinsics to :raw instructions.
1198 def : Pat <(int_hexagon_S2_tableidxb_goodsyntax IntRegs:$src1, IntRegs:$src2,
1203 def : S2op_tableidx_pat <int_hexagon_S2_tableidxh_goodsyntax, S2_tableidxh,
1205 def : S2op_tableidx_pat <int_hexagon_S2_tableidxw_goodsyntax, S2_tableidxw,
1207 def : S2op_tableidx_pat <int_hexagon_S2_tableidxd_goodsyntax, S2_tableidxd,
1216 def : T_P_pat <A2_vabsh, int_hexagon_A2_vabsh>;
1217 def : T_P_pat <A2_vabshsat, int_hexagon_A2_vabshsat>;
1221 def : T_PI_pat <S2_asr_i_vh, int_hexagon_S2_asr_i_vh>;
1222 def : T_PI_pat <S2_lsr_i_vh, int_hexagon_S2_lsr_i_vh>;
1223 def : T_PI_pat <S2_asl_i_vh, int_hexagon_S2_asl_i_vh>;
1227 def : T_PR_pat <S2_asr_r_vh, int_hexagon_S2_asr_r_vh>;
1228 def : T_PR_pat <S2_lsr_r_vh, int_hexagon_S2_lsr_r_vh>;
1229 def : T_PR_pat <S2_asl_r_vh, int_hexagon_S2_asl_r_vh>;
1230 def : T_PR_pat <S2_lsl_r_vh, int_hexagon_S2_lsl_r_vh>;
1237 def : T_P_pat <A2_vabsw, int_hexagon_A2_vabsw>;
1238 def : T_P_pat <A2_vabswsat, int_hexagon_A2_vabswsat>;
1242 def : T_PI_pat <S2_asr_i_vw, int_hexagon_S2_asr_i_vw>;
1243 def : T_PI_pat <S2_lsr_i_vw, int_hexagon_S2_lsr_i_vw>;
1244 def : T_PI_pat <S2_asl_i_vw, int_hexagon_S2_asl_i_vw>;
1248 def : T_PR_pat <S2_asr_r_vw, int_hexagon_S2_asr_r_vw>;
1249 def : T_PR_pat <S2_lsr_r_vw, int_hexagon_S2_lsr_r_vw>;
1250 def : T_PR_pat <S2_asl_r_vw, int_hexagon_S2_asl_r_vw>;
1251 def : T_PR_pat <S2_lsl_r_vw, int_hexagon_S2_lsl_r_vw>;
1255 def : T_PR_pat <S2_asr_r_svw_trun, int_hexagon_S2_asr_r_svw_trun>;
1257 def : T_R_pat<L2_loadw_locked, int_hexagon_L2_loadw_locked>;
1258 def : T_R_pat<L4_loadd_locked, int_hexagon_L4_loadd_locked>;
1260 def: Pat<(i32 (int_hexagon_S2_storew_locked (I32:$Rs), (I32:$Rt))),
1262 def: Pat<(i32 (int_hexagon_S4_stored_locked (I32:$Rs), (I64:$Rt))),
1273 def : T_stb_pat <S2_storerh_pbr_pseudo, int_hexagon_brev_sth, I32>;
1274 def : T_stb_pat <S2_storerb_pbr_pseudo, int_hexagon_brev_stb, I32>;
1275 def : T_stb_pat <S2_storeri_pbr_pseudo, int_hexagon_brev_stw, I32>;
1276 def : T_stb_pat <S2_storerf_pbr_pseudo, int_hexagon_brev_sthhi, I32>;
1277 def : T_stb_pat <S2_storerd_pbr_pseudo, int_hexagon_brev_std, I64>;
1283 def: T_stc_pat<S2_storerb_pci_pseudo, int_hexagon_circ_stb, s4_0ImmPred, I32>;
1284 def: T_stc_pat<S2_storerh_pci_pseudo, int_hexagon_circ_sth, s4_1ImmPred, I32>;
1285 def: T_stc_pat<S2_storeri_pci_pseudo, int_hexagon_circ_stw, s4_2ImmPred, I32>;
1286 def: T_stc_pat<S2_storerd_pci_pseudo, int_hexagon_circ_std, s4_3ImmPred, I64>;
1287 def: T_stc_pat<S2_storerf_pci_pseudo, int_hexagon_circ_sthhi, s4_1ImmPred, I32>;