Lines Matching refs:bits
26 bits<10> offset;
28 bits<16> Inst;
34 class BEQZC_BNEZC_FM_MM16R6<bits<6> op> : MicroMipsR6Inst16 {
35 bits<3> rs;
36 bits<7> offset;
38 bits<16> Inst;
45 class POOL16C_JALRC_FM_MM16R6<bits<5> op> {
46 bits<5> rs;
48 bits<16> Inst;
55 class POOL16C_JRCADDIUSP_FM_MM16R6<bits<5> op> {
56 bits<5> imm;
58 bits<16> Inst;
65 class POOL16C_LWM_SWM_FM_MM16R6<bits<4> funct> {
66 bits<2> rt;
67 bits<4> addr;
69 bits<16> Inst;
77 class POOL32A_BITSWAP_FM_MMR6<bits<6> funct> : MipsR6Inst {
78 bits<5> rd;
79 bits<5> rt;
81 bits<32> Inst;
91 class CACHE_PREF_FM_MMR6<bits<6> opgroup, bits<4> funct> : MipsR6Inst {
92 bits<21> addr;
93 bits<5> hint;
95 bits<32> Inst;
104 class ARITH_FM_MMR6<string instr_asm, bits<10> funct> : MMR6Arch<instr_asm> {
105 bits<5> rd;
106 bits<5> rt;
107 bits<5> rs;
109 bits<32> Inst;
119 class ADDI_FM_MMR6<string instr_asm, bits<6> op> : MMR6Arch<instr_asm> {
120 bits<5> rt;
121 bits<5> rs;
122 bits<16> imm16;
124 bits<32> Inst;
132 class POOL32C_ST_EVA_FM_MMR6<bits<6> op, bits<3> funct> : MipsR6Inst {
133 bits<21> addr;
134 bits<5> hint;
135 bits<5> base = addr{20-16};
136 bits<9> offset = addr{8-0};
138 bits<32> Inst;
149 bits<21> addr;
150 bits<5> rt;
151 bits<5> base = addr{20-16};
152 bits<16> offset = addr{15-0};
154 bits<32> Inst;
163 bits<21> addr;
164 bits<5> rt;
165 bits<5> base = addr{20-16};
166 bits<16> offset = addr{15-0};
168 bits<32> Inst;
176 class POOL32C_LB_LBU_FM_MMR6<bits<3> funct> : MipsR6Inst {
177 bits<21> addr;
178 bits<5> rt;
180 bits<32> Inst;
190 class SIGN_EXTEND_FM_MMR6<string instr_asm, bits<10> funct>
192 bits<5> rd;
193 bits<5> rt;
195 bits<32> Inst;
204 class PCREL19_FM_MMR6<bits<2> funct> : MipsR6Inst {
205 bits<5> rt;
206 bits<19> imm;
208 bits<32> Inst;
216 class PCREL16_FM_MMR6<bits<5> funct> : MipsR6Inst {
217 bits<5> rt;
218 bits<16> imm;
220 bits<32> Inst;
228 class POOL32A_FM_MMR6<bits<10> funct> : MipsR6Inst {
229 bits<5> rd;
230 bits<5> rs;
231 bits<5> rt;
233 bits<32> Inst;
243 class POOL32A_PAUSE_FM_MMR6<string instr_asm, bits<5> op> : MMR6Arch<instr_asm> {
244 bits<32> Inst;
254 class POOL32A_RDPGPR_FM_MMR6<bits<10> funct> {
255 bits<5> rt;
256 bits<5> rd;
257 bits<32> Inst;
267 bits<5> rt;
268 bits<5> rs;
269 bits<3> sel;
270 bits<32> Inst;
282 bits<5> stype;
284 bits<32> Inst;
294 bits<21> addr;
295 bits<5> base = addr{20-16};
296 bits<16> immediate = addr{15-0};
298 bits<32> Inst;
306 class POOL32A_2R_FM_MMR6<bits<10> funct> : MipsR6Inst {
307 bits<5> rs;
308 bits<5> rt;
310 bits<32> Inst;
319 class SPECIAL_2R_FM_MMR6<bits<6> funct> : MipsR6Inst {
320 bits<5> rs;
321 bits<5> rt;
323 bits<32> Inst;
333 class POOL32A_ALIGN_FM_MMR6<bits<6> funct> : MipsR6Inst {
334 bits<5> rd;
335 bits<5> rs;
336 bits<5> rt;
337 bits<2> bp;
339 bits<32> Inst;
351 bits<5> rs;
352 bits<5> rt;
353 bits<16> imm;
355 bits<32> Inst;
363 class POOL32A_LSA_FM<bits<6> funct> : MipsR6Inst {
364 bits<5> rd;
365 bits<5> rs;
366 bits<5> rt;
367 bits<2> imm2;
369 bits<32> Inst;
380 class SB32_SH32_STORE_FM_MMR6<bits<6> op> {
381 bits<5> rt;
382 bits<21> addr;
383 bits<5> base = addr{20-16};
384 bits<16> offset = addr{15-0};
386 bits<32> Inst;
394 class POOL32C_STORE_EVA_FM_MMR6<bits<3> funct> {
395 bits<5> rt;
396 bits<21> addr;
397 bits<5> base = addr{20-16};
398 bits<9> offset = addr{8-0};
400 bits<32> Inst;
410 class LOAD_WORD_EVA_FM_MMR6<bits<3> funct> {
411 bits<5> rt;
412 bits<21> addr;
413 bits<5> base = addr{20-16};
414 bits<9> offset = addr{8-0};
416 bits<32> Inst;
427 bits<5> rt;
428 bits<21> addr;
429 bits<5> base = addr{20-16};
430 bits<16> offset = addr{15-0};
432 bits<32> Inst;
441 bits<5> rt;
442 bits<16> imm16;
444 bits<32> Inst;
452 class CMP_BRANCH_1R_RT_OFF16_FM_MMR6<bits<6> funct> : MipsR6Inst {
453 bits<5> rt;
454 bits<16> offset;
456 bits<32> Inst;
464 class CMP_BRANCH_1R_BOTH_OFF16_FM_MMR6<bits<6> funct> : MipsR6Inst {
465 bits<5> rt;
466 bits<16> offset;
468 bits<32> Inst;
476 class POOL32A_ERET_FM_MMR6<string instr_asm, bits<10> funct>
478 bits<32> Inst;
487 bits<32> Inst;
497 bits<10> code_1;
498 bits<10> code_2;
499 bits<32> Inst;
506 class BARRIER_MMR6_ENC<string instr_asm, bits<5> op> : MMR6Arch<instr_asm> {
507 bits<32> Inst;
517 class POOL32A_EIDI_MMR6_ENC<string instr_asm, bits<10> funct>
519 bits<32> Inst;
520 bits<5> rt; // Actually rs but we're sharing code with the standard encodings which call it rt
529 class SHIFT_MMR6_ENC<string instr_asm, bits<10> funct, bit rotate> : MMR6Arch<instr_asm> {
530 bits<5> rd;
531 bits<5> rt;
532 bits<5> shamt;
534 bits<32> Inst;
544 class SW32_FM_MMR6<string instr_asm, bits<6> op> : MMR6Arch<instr_asm> {
545 bits<5> rt;
546 bits<21> addr;
548 bits<32> Inst;
556 class POOL32C_SWE_FM_MMR6<string instr_asm, bits<6> op, bits<4> fmt,
557 bits<3> funct> : MMR6Arch<instr_asm> {
558 bits<5> rt;
559 bits<21> addr;
560 bits<5> base = addr{20-16};
561 bits<9> offset = addr{8-0};
563 bits<32> Inst;
573 class POOL32F_ARITH_FM_MMR6<string instr_asm, bits<2> fmt, bits<8> funct>
575 bits<5> ft;
576 bits<5> fs;
577 bits<5> fd;
579 bits<32> Inst;
590 class POOL32F_ARITHF_FM_MMR6<string instr_asm, bits<2> fmt, bits<9> funct>
592 bits<5> ft;
593 bits<5> fs;
594 bits<5> fd;
596 bits<32> Inst;
606 class POOL32F_MOV_NEG_FM_MMR6<string instr_asm, bits<2> fmt, bits<7> funct>
608 bits<5> ft;
609 bits<5> fs;
611 bits<32> Inst;
622 class POOL32F_MINMAX_FM<string instr_asm, bits<2> fmt, bits<9> funct>
624 bits<5> ft;
625 bits<5> fs;
626 bits<5> fd;
628 bits<32> Inst;
638 class POOL32F_CMP_FM<string instr_asm, bits<6> format, FIELD_CMP_COND Cond>
640 bits<5> ft;
641 bits<5> fs;
642 bits<5> fd;
644 bits<32> Inst;
654 class POOL32F_CVT_LW_FM<string instr_asm, bit fmt, bits<8> funct>
656 bits<5> ft;
657 bits<5> fs;
659 bits<32> Inst;
669 class POOL32F_CVT_DS_FM<string instr_asm, bits<2> fmt, bits<7> funct>
671 bits<5> ft;
672 bits<5> fs;
674 bits<32> Inst;
684 class POOL32F_ABS_FM_MMR6<string instr_asm, bits<2> fmt, bits<7> funct>
686 bits<5> ft;
687 bits<5> fs;
689 bits<32> Inst;
700 class POOL32F_MATH_FM_MMR6<string instr_asm, bits<1> fmt, bits<8> funct>
702 bits<5> ft;
703 bits<5> fs;
705 bits<32> Inst;
717 bits<3> rs;
718 bits<3> rt;
719 bits<3> rd;
721 bits<16> Inst;
731 bits<3> rt;
732 bits<3> rs;
734 bits<16> Inst;
743 bits<3> rt;
744 bits<3> rs;
746 bits<16> Inst;
754 class POOL16C_OR16_XOR16_FM_MMR6<bits<4> op> {
755 bits<3> rt;
756 bits<3> rs;
758 bits<16> Inst;
766 class POOL16C_BREAKPOINT_FM_MMR6<bits<6> op> {
767 bits<4> code_;
768 bits<16> Inst;
776 bits<3> rs;
777 bits<3> rt;
778 bits<3> rd;
780 bits<16> Inst;
789 class POOL32A_WRPGPR_WSBH_FM_MMR6<bits<10> funct> : MipsR6Inst {
790 bits<5> rt;
791 bits<5> rs;
793 bits<32> Inst;
802 class POOL32F_RECIP_ROUND_FM_MMR6<string instr_asm, bits<1> fmt, bits<8> funct>
804 bits<5> ft;
805 bits<5> fs;
807 bits<32> Inst;
818 class POOL32F_RINT_FM_MMR6<string instr_asm, bits<2> fmt>
820 bits<5> fs;
821 bits<5> fd;
823 bits<32> Inst;
833 class POOL32F_SEL_FM_MMR6<string instr_asm, bits<2> fmt, bits<9> funct>
835 bits<5> ft;
836 bits<5> fs;
837 bits<5> fd;
839 bits<32> Inst;
849 class POOL32F_CLASS_FM_MMR6<string instr_asm, bits<2> fmt, bits<9> funct>
851 bits<5> fs;
852 bits<5> fd;
854 bits<32> Inst;