Lines Matching refs:RegDU
209 bool delayHasHazard(const MachineInstr &Candidate, RegDefsUses &RegDU,
216 RegDefsUses &RegDU, InspectMemInstr &IM, Iter Slot,
244 RegDefsUses &RegDU, bool &HasMultipleSuccs,
651 RegDefsUses &RegDU, InspectMemInstr& IM, Iter Slot, in searchRange() argument
680 if (delayHasHazard(*CurrI, RegDU, IM)) in searchRange()
716 RegDefsUses RegDU(*Fn->getSubtarget().getRegisterInfo()); in searchBackward() local
720 RegDU.init(*Slot); in searchBackward()
722 if (!searchRange(MBB, ReverseIter(Slot), MBB.rend(), RegDU, MemDU, Slot, in searchBackward()
737 RegDefsUses RegDU(*MBB.getParent()->getSubtarget().getRegisterInfo()); in searchForward() local
741 RegDU.setCallerSaved(*Slot); in searchForward()
743 if (!searchRange(MBB, std::next(Slot), MBB.end(), RegDU, NM, Slot, Filler)) in searchForward()
761 RegDefsUses RegDU(*MBB.getParent()->getSubtarget().getRegisterInfo()); in searchSuccBBs() local
771 if (!examinePred(**PI, *SuccBB, RegDU, HasMultipleSuccs, BrMap)) in searchSuccBBs()
776 RegDU.setUnallocatableRegs(*Fn); in searchSuccBBs()
787 if (!searchRange(MBB, SuccBB->begin(), SuccBB->end(), RegDU, *IM, Slot, in searchSuccBBs()
850 RegDefsUses &RegDU, bool &HasMultipleSuccs, in examinePred() argument
863 RegDU.addLiveOut(Pred, Succ); in examinePred()
870 bool Filler::delayHasHazard(const MachineInstr &Candidate, RegDefsUses &RegDU, in delayHasHazard() argument
878 HasHazard |= RegDU.update(Candidate, 0, Candidate.getNumOperands()); in delayHasHazard()