Lines Matching refs:RegDefsUses
70 class RegDefsUses { class
72 RegDefsUses(const TargetRegisterInfo &TRI);
209 bool delayHasHazard(const MachineInstr &Candidate, RegDefsUses &RegDU,
216 RegDefsUses &RegDU, InspectMemInstr &IM, Iter Slot,
244 RegDefsUses &RegDU, bool &HasMultipleSuccs,
295 RegDefsUses::RegDefsUses(const TargetRegisterInfo &TRI) in RegDefsUses() function in RegDefsUses
298 void RegDefsUses::init(const MachineInstr &MI) { in init()
315 void RegDefsUses::setCallerSaved(const MachineInstr &MI) { in setCallerSaved()
340 void RegDefsUses::setUnallocatableRegs(const MachineFunction &MF) { in setUnallocatableRegs()
353 void RegDefsUses::addLiveOut(const MachineBasicBlock &MBB, in addLiveOut()
362 bool RegDefsUses::update(const MachineInstr &MI, unsigned Begin, unsigned End) { in update()
379 bool RegDefsUses::checkRegDefsUses(BitVector &NewDefs, BitVector &NewUses, in checkRegDefsUses()
392 bool RegDefsUses::isRegInSet(const BitVector &RegSet, unsigned Reg) const { in isRegInSet()
651 RegDefsUses &RegDU, InspectMemInstr& IM, Iter Slot, in searchRange()
716 RegDefsUses RegDU(*Fn->getSubtarget().getRegisterInfo()); in searchBackward()
737 RegDefsUses RegDU(*MBB.getParent()->getSubtarget().getRegisterInfo()); in searchForward()
761 RegDefsUses RegDU(*MBB.getParent()->getSubtarget().getRegisterInfo()); in searchSuccBBs()
850 RegDefsUses &RegDU, bool &HasMultipleSuccs, in examinePred()
870 bool Filler::delayHasHazard(const MachineInstr &Candidate, RegDefsUses &RegDU, in delayHasHazard()