Lines Matching refs:GPR32RegClass
265 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLogicalOp()
284 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in fastMaterializeAlloca()
298 const TargetRegisterClass *RC = &Mips::GPR32RegClass; in materializeInt()
335 unsigned TempReg = materialize32BitInt(Imm, &Mips::GPR32RegClass); in materializeFP()
341 unsigned TempReg1 = materialize32BitInt(Imm >> 32, &Mips::GPR32RegClass); in materializeFP()
343 materialize32BitInt(Imm & 0xFFFFFFFF, &Mips::GPR32RegClass); in materializeFP()
354 const TargetRegisterClass *RC = &Mips::GPR32RegClass; in materializeGV()
376 const TargetRegisterClass *RC = &Mips::GPR32RegClass; in materializeExternalCallSym()
596 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
602 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
616 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
622 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
636 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
642 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
688 unsigned RegWithZero = createResultReg(&Mips::GPR32RegClass); in emitCmp()
689 unsigned RegWithOne = createResultReg(&Mips::GPR32RegClass); in emitCmp()
712 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
717 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
722 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
913 unsigned CondReg = createResultReg(&Mips::GPR32RegClass); in selectBranch()
927 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectCmp()
969 RC = &Mips::GPR32RegClass; in selectSelect()
988 unsigned ZExtCondReg = createResultReg(&Mips::GPR32RegClass); in selectSelect()
1061 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt()
1343 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1354 TempReg[i] = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1367 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1375 TempReg[i] = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1555 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectIntExt()
1575 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitIntSExt32r1()
1643 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in emitIntExt()
1679 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectDivRem()
1698 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectShift()
1710 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in selectShift()
1834 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in getRegEnsuringSimpleIntegerWidening()
1845 materialize32BitInt(Addr.getOffset(), &Mips::GPR32RegClass); in simplifyAddress()
1846 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in simplifyAddress()