Lines Matching refs:opstr

104 class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm,
107          !strconcat(opstr, "\t$fd, $fs, $ft"),
108          [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>,
113 multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm,
115   def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, FGR_32;
116   def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
121 class ABSS_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
123   InstSE<(outs DstRC:$fd), (ins SrcRC:$fs), !strconcat(opstr, "\t$fd, $fs"),
124          [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>,
128 multiclass ABSS_M<string opstr, InstrItinClass Itin,
130   def _D32 : MMRel, ABSS_FT<opstr, AFGR64Opnd, AFGR64Opnd, Itin, OpNode>,
132   def _D64 : ABSS_FT<opstr, FGR64Opnd, FGR64Opnd, Itin, OpNode>, FGR_64 {
137 multiclass ROUND_M<string opstr, InstrItinClass Itin> {
138   def _D32 : MMRel, ABSS_FT<opstr, FGR32Opnd, AFGR64Opnd, Itin>, FGR_32;
139   def _D64 : StdMMR6Rel, ABSS_FT<opstr, FGR32Opnd, FGR64Opnd, Itin>, FGR_64 {
144 class MFC1_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
146   InstSE<(outs DstRC:$rt), (ins SrcRC:$fs), !strconcat(opstr, "\t$rt, $fs"),
147          [(set DstRC:$rt, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>, HARDFLOAT;
149 class MTC1_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
151   InstSE<(outs DstRC:$fs), (ins SrcRC:$rt), !strconcat(opstr, "\t$rt, $fs"),
152          [(set DstRC:$fs, (OpNode SrcRC:$rt))], Itin, FrmFR, opstr>, HARDFLOAT;
154 class MTC1_64_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
157          !strconcat(opstr, "\t$rt, $fs"), [], Itin, FrmFR, opstr>, HARDFLOAT {
163 class LW_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
165   InstSE<(outs RC:$rt), (ins mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
166          [(set RC:$rt, (OpNode addrDefault:$addr))], Itin, FrmFI, opstr>,
172 class SW_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
174   InstSE<(outs), (ins RC:$rt, mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
175          [(OpNode RC:$rt, addrDefault:$addr)], Itin, FrmFI, opstr>, HARDFLOAT {
180 class MADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
183          !strconcat(opstr, "\t$fd, $fr, $fs, $ft"),
185          FrmFR, opstr>, HARDFLOAT;
187 class NMADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
190          !strconcat(opstr, "\t$fd, $fr, $fs, $ft"),
192          Itin, FrmFR, opstr>, HARDFLOAT;
194 class LWXC1_FT<string opstr, RegisterOperand DRC,
197          !strconcat(opstr, "\t$fd, ${index}(${base})"),
199          FrmFI, opstr>, HARDFLOAT {
203 class SWXC1_FT<string opstr, RegisterOperand DRC,
206          !strconcat(opstr, "\t$fs, ${index}(${base})"),
208          FrmFI, opstr>, HARDFLOAT {
212 class BC1F_FT<string opstr, DAGOperand opnd, InstrItinClass Itin,
215          !strconcat(opstr, "\t$fcc, $offset"),
217          FrmFI, opstr>, HARDFLOAT {