76   const MipsSEInstrInfo &TII;  member in __anon82167c930111::ExpandPseudo
84       TII(*static_cast<const MipsSEInstrInfo *>(Subtarget.getInstrInfo())),  in ExpandPseudo()
160   TII.loadRegFromStack(MBB, I, VR, FI, RC, &RegInfo, 0);  in expandLoadCCond()
161   BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), Dst)  in expandLoadCCond()
175   BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), VR)  in expandStoreCCond()
177   TII.storeRegToStack(MBB, I, VR, true, FI, RC, &RegInfo, 0);  in expandStoreCCond()
196   const MCInstrDesc &Desc = TII.get(TargetOpcode::COPY);  in expandLoadACC()
198   TII.loadRegFromStack(MBB, I, VR0, FI, RC, &RegInfo, 0);  in expandLoadACC()
200   TII.loadRegFromStack(MBB, I, VR1, FI, RC, &RegInfo, RegSize);  in expandLoadACC()
221   BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);  in expandStoreACC()
222   TII.storeRegToStack(MBB, I, VR0, true, FI, RC, &RegInfo, 0);  in expandStoreACC()
223   BuildMI(MBB, I, DL, TII.get(MFHiOpc), VR1).addReg(Src, SrcKill);  in expandStoreACC()
224   TII.storeRegToStack(MBB, I, VR1, true, FI, RC, &RegInfo, RegSize);  in expandStoreACC()
254   BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);  in expandCopyACC()
255   BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstLo)  in expandCopyACC()
257   BuildMI(MBB, I, DL, TII.get(MFHiOpc), VR1).addReg(Src, SrcKill);  in expandCopyACC()
258   BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstHi)  in expandCopyACC()
304     TII.storeRegToStack(MBB, I, LoReg, I->getOperand(1).isKill(), FI, RC,  in expandBuildPairF64()
306     TII.storeRegToStack(MBB, I, HiReg, I->getOperand(2).isKill(), FI, RC,  in expandBuildPairF64()
308     TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, 0);  in expandBuildPairF64()
328     BuildMI(MBB, I, I->getDebugLoc(), TII.get(Mips::IMPLICIT_DEF), DstReg);  in expandExtractElementF64()
365     TII.storeRegToStack(MBB, I, SrcReg, Op1.isKill(), FI, RC, &RegInfo, 0);  in expandExtractElementF64()
366     TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, Offset);  in expandExtractElementF64()
382   const MipsSEInstrInfo &TII =  in emitPrologue()  local
411   TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);  in emitPrologue()
416   BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
450         BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
455         BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
466         BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
471         BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
477         BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
488       TII.storeRegToStackSlot(MBB, MBBI, ABI.GetEhDataReg(I), false,  in emitPrologue()
498       BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
506     BuildMI(MBB, MBBI, dl, TII.get(MOVE), FP).addReg(SP).addReg(ZERO)  in emitPrologue()
512     BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))  in emitPrologue()
523       BuildMI(MBB, MBBI, dl, TII.get(ADDiu), VR).addReg(ZERO) .addImm(MaxAlign);  in emitPrologue()
524       BuildMI(MBB, MBBI, dl, TII.get(AND), SP).addReg(SP).addReg(VR);  in emitPrologue()
529         BuildMI(MBB, MBBI, dl, TII.get(MOVE), BP)  in emitPrologue()
672   const MipsSEInstrInfo &TII =  in emitEpilogue()  local
693     BuildMI(MBB, I, DL, TII.get(MOVE), SP).addReg(FP).addReg(ZERO);  in emitEpilogue()
707       TII.loadRegFromStackSlot(MBB, I, ABI.GetEhDataReg(J),  in emitEpilogue()
722   TII.adjustStackPtr(SP, StackSize, MBB, MBBI);  in emitEpilogue()
778   const TargetInstrInfo &TII = *STI.getInstrInfo();  in spillCalleeSavedRegisters()  local
808       BuildMI(MBB, MI, DL, TII.get(Op), Mips::K0)  in spillCalleeSavedRegisters()
815     TII.storeRegToStackSlot(*EntryBlock, MI, Reg, IsKill,  in spillCalleeSavedRegisters()