107       BuildMI(MBB, I, DL, get(Mips::RDDSP), DestReg).addImm(1 << 4)  in copyPhysReg()
128       BuildMI(MBB, I, DL, get(Mips::WRDSP))  in copyPhysReg()
167   MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc));  in copyPhysReg()
229       BuildMI(MBB, I, DL, get(Mips::MFHI), Mips::K0);  in storeRegToStack()
232       BuildMI(MBB, I, DL, get(Mips::MFHI64), Mips::K0_64);  in storeRegToStack()
235       BuildMI(MBB, I, DL, get(Mips::MFLO), Mips::K0);  in storeRegToStack()
238       BuildMI(MBB, I, DL, get(Mips::MFLO64), Mips::K0_64);  in storeRegToStack()
244   BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill))  in storeRegToStack()
300     BuildMI(MBB, I, DL, get(Opc), DestReg)  in loadRegFromStack()
320     BuildMI(MBB, I, DL, get(Opc), Reg)  in loadRegFromStack()
324     BuildMI(MBB, I, DL, get(LdOp)).addReg(Reg);  in loadRegFromStack()
439     BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount);  in adjustStackPtr()
442     BuildMI(MBB, I, DL, get(ADDu), SP).addReg(SP).addReg(Reg, RegState::Kill);  in adjustStackPtr()
474     BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd));  in loadImmediate()
476     BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(ZEROReg)  in loadImmediate()
481     BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(Reg, RegState::Kill)  in loadImmediate()
503     BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))  in expandRetRA()
506     BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn)).addReg(Mips::RA);  in expandRetRA()
511   BuildMI(MBB, I, I->getDebugLoc(), get(Mips::ERET));  in expandERet()
529   BuildMI(MBB, I, I->getDebugLoc(), get(NewOpc), I->getOperand(0).getReg());  in expandPseudoMFHiLo()
545   MachineInstrBuilder LoInst = BuildMI(MBB, I, DL, get(LoOpc));  in expandPseudoMTLoHi()
546   MachineInstrBuilder HiInst = BuildMI(MBB, I, DL, get(HiOpc));  in expandPseudoMTLoHi()
582   BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc);  in expandCvtFPInt()
583   BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill);  in expandCvtFPInt()
619     BuildMI(MBB, I, dl, get(FP64 ? Mips::MFHC1_D64 : Mips::MFHC1_D32), DstReg)  in expandExtractElementF64()
622     BuildMI(MBB, I, dl, get(Mips::MFC1), DstReg).addReg(SubReg);  in expandExtractElementF64()
657   BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_lo))  in expandBuildPairF64()
672     BuildMI(MBB, I, dl, get(FP64 ? Mips::MTHC1_D64 : Mips::MTHC1_D32), DstReg)  in expandBuildPairF64()
678     BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_hi))  in expandBuildPairF64()
701     BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), T9)  in expandEhReturn()
704   BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), RA)  in expandEhReturn()
707   BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), SP).addReg(SP).addReg(OffsetReg);  in expandEhReturn()