Lines Matching refs:InsIdx

2087   unsigned InsIdx = 0;  in LowerFormalArguments()  local
2090 for (unsigned i = 0, e = theArgs.size(); i != e; ++i, ++idx, ++InsIdx) { in LowerFormalArguments()
2114 InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT)); in LowerFormalArguments()
2115 ++InsIdx; in LowerFormalArguments()
2118 --InsIdx; in LowerFormalArguments()
2125 InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT)); in LowerFormalArguments()
2126 ++InsIdx; in LowerFormalArguments()
2129 --InsIdx; in LowerFormalArguments()
2132 InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT)); in LowerFormalArguments()
2170 if (Ins[InsIdx].VT.getSizeInBits() > partVT.getSizeInBits()) { in LowerFormalArguments()
2171 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? in LowerFormalArguments()
2173 p = DAG.getExtLoad(ExtOp, dl, Ins[InsIdx].VT, Root, srcAddr, in LowerFormalArguments()
2184 ++InsIdx; in LowerFormalArguments()
2187 --InsIdx; in LowerFormalArguments()
2211 if (Ins[InsIdx].VT.getSizeInBits() > EltVT.getSizeInBits()) in LowerFormalArguments()
2212 P = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, P); in LowerFormalArguments()
2214 ++InsIdx; in LowerFormalArguments()
2233 if (Ins[InsIdx].VT.getSizeInBits() > EltVT.getSizeInBits()) { in LowerFormalArguments()
2234 Elt0 = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt0); in LowerFormalArguments()
2235 Elt1 = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt1); in LowerFormalArguments()
2240 InsIdx += 2; in LowerFormalArguments()
2276 if (Ins[InsIdx].VT.getSizeInBits() > EltVT.getSizeInBits()) in LowerFormalArguments()
2277 Elt = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt); in LowerFormalArguments()
2282 InsIdx += NumElts; in LowerFormalArguments()
2286 --InsIdx; in LowerFormalArguments()
2296 if (ObjectVT.getSizeInBits() < Ins[InsIdx].VT.getSizeInBits()) { in LowerFormalArguments()
2297 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? in LowerFormalArguments()
2300 ExtOp, dl, Ins[InsIdx].VT, Root, Arg, MachinePointerInfo(srcValue), in LowerFormalArguments()
2305 Ins[InsIdx].VT, dl, Root, Arg, MachinePointerInfo(srcValue), false, in LowerFormalArguments()
2323 assert(ObjectVT == Ins[InsIdx].VT && in LowerFormalArguments()