Lines Matching refs:ShiftReg
8246 unsigned ShiftReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
8291 BuildMI(BB, dl, TII->get(is64bit ? PPC::XORI8 : PPC::XORI), ShiftReg) in EmitPartwordAtomicBinary()
8300 .addReg(incr).addReg(ShiftReg); in EmitPartwordAtomicBinary()
8308 .addReg(Mask2Reg).addReg(ShiftReg); in EmitPartwordAtomicBinary()
8333 .addReg(ShiftReg); in EmitPartwordAtomicBinary()
8963 unsigned ShiftReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
9018 BuildMI(BB, dl, TII->get(is64bit ? PPC::XORI8 : PPC::XORI), ShiftReg) in EmitInstrWithCustomInserter()
9027 .addReg(newval).addReg(ShiftReg); in EmitInstrWithCustomInserter()
9029 .addReg(oldval).addReg(ShiftReg); in EmitInstrWithCustomInserter()
9038 .addReg(Mask2Reg).addReg(ShiftReg); in EmitInstrWithCustomInserter()
9078 .addReg(ShiftReg); in EmitInstrWithCustomInserter()