Lines Matching refs:SDValue

58   SDValue Base;
60 SDValue Index;
118 RxSBGOperands(unsigned Op, SDValue N) in RxSBGOperands()
126 SDValue Input;
136 inline SDValue getImm(const SDNode *Node, uint64_t Imm) const { in getImm()
153 bool selectAddress(SDValue N, SystemZAddressingMode &AM) const;
157 SDValue &Base, SDValue &Disp) const;
159 SDValue &Base, SDValue &Disp, SDValue &Index) const;
164 bool selectBDAddr(SystemZAddressingMode::DispRange DR, SDValue Addr,
165 SDValue &Base, SDValue &Disp) const;
170 bool selectMVIAddr(SystemZAddressingMode::DispRange DR, SDValue Addr,
171 SDValue &Base, SDValue &Disp) const;
177 SystemZAddressingMode::DispRange DR, SDValue Addr,
178 SDValue &Base, SDValue &Disp, SDValue &Index) const;
181 bool selectPCRelAddress(SDValue Addr, SDValue &Target) const { in selectPCRelAddress()
190 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr12Only()
193 bool selectBDAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr12Pair()
196 bool selectBDAddr20Only(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr20Only()
199 bool selectBDAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr20Pair()
204 bool selectMVIAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectMVIAddr12Pair()
207 bool selectMVIAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectMVIAddr20Pair()
212 bool selectBDXAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp, in selectBDXAddr12Only()
213 SDValue &Index) const { in selectBDXAddr12Only()
218 bool selectBDXAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp, in selectBDXAddr12Pair()
219 SDValue &Index) const { in selectBDXAddr12Pair()
224 bool selectDynAlloc12Only(SDValue Addr, SDValue &Base, SDValue &Disp, in selectDynAlloc12Only()
225 SDValue &Index) const { in selectDynAlloc12Only()
230 bool selectBDXAddr20Only(SDValue Addr, SDValue &Base, SDValue &Disp, in selectBDXAddr20Only()
231 SDValue &Index) const { in selectBDXAddr20Only()
236 bool selectBDXAddr20Only128(SDValue Addr, SDValue &Base, SDValue &Disp, in selectBDXAddr20Only128()
237 SDValue &Index) const { in selectBDXAddr20Only128()
242 bool selectBDXAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp, in selectBDXAddr20Pair()
243 SDValue &Index) const { in selectBDXAddr20Pair()
248 bool selectLAAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp, in selectLAAddr12Pair()
249 SDValue &Index) const { in selectLAAddr12Pair()
254 bool selectLAAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp, in selectLAAddr20Pair()
255 SDValue &Index) const { in selectLAAddr20Pair()
265 bool selectBDVAddr12Only(SDValue Addr, SDValue Elem, SDValue &Base,
266 SDValue &Disp, SDValue &Index) const;
271 bool detectOrAndInsertion(SDValue &Op, uint64_t InsertMask) const;
282 SDValue getUNDEF(SDLoc DL, EVT VT) const;
285 SDValue convertTo(SDLoc DL, EVT VT, SDValue N) const;
302 SDNode *splitLargeImmediate(unsigned Opcode, SDNode *Node, SDValue Op0,
347 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
348 std::vector<SDValue> &OutOps) override;
382 SDValue Value) { in changeComponent()
393 SDValue Value) { in expandAdjDynAlloc()
404 static bool expandIndex(SystemZAddressingMode &AM, SDValue Base, in expandIndex()
405 SDValue Index) { in expandIndex()
417 SDValue Op0, uint64_t Op1) { in expandDisp()
433 SDValue N = IsBase ? AM.Base : AM.Index; in expandAddress()
440 SDValue Op0 = N.getOperand(0); in expandAddress()
441 SDValue Op1 = N.getOperand(1); in expandAddress()
462 SDValue Full = N.getOperand(0); in expandAddress()
463 SDValue Base = N.getOperand(1); in expandAddress()
464 SDValue Anchor = Base.getOperand(0); in expandAddress()
546 bool SystemZDAGToDAGISel::selectAddress(SDValue Addr, in selectAddress()
554 expandDisp(AM, true, SDValue(), in selectAddress()
585 static void insertDAGNode(SelectionDAG *DAG, SDNode *Pos, SDValue N) { in insertDAGNode()
594 EVT VT, SDValue &Base, in getAddressOperands()
595 SDValue &Disp) const { in getAddressOperands()
609 SDValue Trunc = CurDAG->getNode(ISD::TRUNCATE, DL, VT, Base); in getAddressOperands()
619 EVT VT, SDValue &Base, in getAddressOperands()
620 SDValue &Disp, in getAddressOperands()
621 SDValue &Index) const { in getAddressOperands()
631 SDValue Addr, SDValue &Base, in selectBDAddr()
632 SDValue &Disp) const { in selectBDAddr()
642 SDValue Addr, SDValue &Base, in selectMVIAddr()
643 SDValue &Disp) const { in selectMVIAddr()
654 SDValue Addr, SDValue &Base, in selectBDXAddr()
655 SDValue &Disp, SDValue &Index) const { in selectBDXAddr()
664 bool SystemZDAGToDAGISel::selectBDVAddr12Only(SDValue Addr, SDValue Elem, in selectBDVAddr12Only()
665 SDValue &Base, in selectBDVAddr12Only()
666 SDValue &Disp, in selectBDVAddr12Only()
667 SDValue &Index) const { in selectBDVAddr12Only()
668 SDValue Regs[2]; in selectBDVAddr12Only()
688 bool SystemZDAGToDAGISel::detectOrAndInsertion(SDValue &Op, in detectOrAndInsertion()
741 SDValue N = RxSBG.Input; in expandRxSBG()
752 SDValue Input = N.getOperand(0); in expandRxSBG()
776 SDValue Input = N.getOperand(0); in expandRxSBG()
891 SDValue SystemZDAGToDAGISel::getUNDEF(SDLoc DL, EVT VT) const { in getUNDEF()
893 return SDValue(N, 0); in getUNDEF()
896 SDValue SystemZDAGToDAGISel::convertTo(SDLoc DL, EVT VT, SDValue N) const { in convertTo()
911 RxSBGOperands RISBG(SystemZ::RISBG, SDValue(N, 0)); in tryRISBGZero()
935 SDValue NewMask = CurDAG->getConstant(RISBG.Mask, DL, VT); in tryRISBGZero()
954 SDValue In = convertTo(DL, VT, RISBG.Input); in tryRISBGZero()
956 return convertTo(DL, VT, SDValue(N, 0)).getNode(); in tryRISBGZero()
970 SDValue Ops[5] = { in tryRISBGZero()
978 return convertTo(DL, VT, SDValue(N, 0)).getNode(); in tryRISBGZero()
1004 SDValue Op0 = N->getOperand(I ^ 1); in tryRxSBG()
1021 SDValue Ops[5] = { in tryRxSBG()
1029 return convertTo(DL, VT, SDValue(N, 0)).getNode(); in tryRxSBG()
1033 SDValue Op0, uint64_t UpperVal, in splitLargeImmediate()
1037 SDValue Upper = CurDAG->getConstant(UpperVal, DL, VT); in splitLargeImmediate()
1040 Upper = SDValue(Select(Upper.getNode()), 0); in splitLargeImmediate()
1042 SDValue Lower = CurDAG->getConstant(LowerVal, DL, VT); in splitLargeImmediate()
1043 SDValue Or = CurDAG->getNode(Opcode, DL, VT, Upper, Lower); in splitLargeImmediate()
1048 SDValue ElemV = N->getOperand(2); in tryGather()
1065 SDValue Base, Disp, Index; in tryGather()
1071 SDValue Ops[] = { in tryGather()
1076 ReplaceUses(SDValue(Load, 1), SDValue(Res, 1)); in tryGather()
1081 SDValue Value = Store->getValue(); in tryScatter()
1088 SDValue ElemV = Value.getOperand(1); in tryScatter()
1093 SDValue Vec = Value.getOperand(0); in tryScatter()
1099 SDValue Base, Disp, Index; in tryScatter()
1105 SDValue Ops[] = { in tryScatter()
1223 Node = splitLargeImmediate(ISD::OR, Node, SDValue(), in Select()
1229 SDValue Op0 = Node->getOperand(0); in Select()
1230 SDValue Op1 = Node->getOperand(1); in Select()
1234 SDValue CCValid = Node->getOperand(2); in Select()
1235 SDValue CCMask = Node->getOperand(3); in Select()
1243 SDValue Op4 = Node->getOperand(4); in Select()
1285 SelectInlineAsmMemoryOperand(const SDValue &Op, in SelectInlineAsmMemoryOperand()
1287 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand()
1299 SDValue Base, Disp, Index; in SelectInlineAsmMemoryOperand()