1827                                      uint64_t Mask, uint64_t CmpVal,  in getTestUnderMaskCond()  argument
1846   if (CmpVal == 0) {  in getTestUnderMaskCond()
1852   if (EffectivelyUnsigned && CmpVal <= Low) {  in getTestUnderMaskCond()
1858   if (EffectivelyUnsigned && CmpVal < Low) {  in getTestUnderMaskCond()
1866   if (CmpVal == Mask) {  in getTestUnderMaskCond()
1872   if (EffectivelyUnsigned && CmpVal >= Mask - Low && CmpVal < Mask) {  in getTestUnderMaskCond()
1878   if (EffectivelyUnsigned && CmpVal > Mask - Low && CmpVal <= Mask) {  in getTestUnderMaskCond()
1886   if (EffectivelyUnsigned && CmpVal >= Mask - High && CmpVal < High) {  in getTestUnderMaskCond()
1892   if (EffectivelyUnsigned && CmpVal > Mask - High && CmpVal <= High) {  in getTestUnderMaskCond()
1902     if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == Low)  in getTestUnderMaskCond()
1904     if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == Low)  in getTestUnderMaskCond()
1906     if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == High)  in getTestUnderMaskCond()
1908     if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == High)  in getTestUnderMaskCond()
1923   uint64_t CmpVal = ConstOp1->getZExtValue();  in adjustForTestUnderMask()  local
1948       if (CmpVal == uint64_t(-1))  in adjustForTestUnderMask()
1950       CmpVal += 1;  in adjustForTestUnderMask()
1955     MaskVal = -(CmpVal & -CmpVal);  in adjustForTestUnderMask()
1970                                         CmpVal >> ShiftVal,  in adjustForTestUnderMask()
1979                                                CmpVal << ShiftVal,  in adjustForTestUnderMask()
1984     NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, MaskVal, CmpVal,  in adjustForTestUnderMask()
3181   SDValue CmpVal = Node->getOperand(2);  in lowerATOMIC_CMP_SWAP()  local
3204   SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift,  in lowerATOMIC_CMP_SWAP()
5247   unsigned CmpVal       = MRI.createVirtualRegister(RC);  in emitAtomicCmpSwapW()  local
5287   BuildMI(MBB, DL, TII->get(SystemZ::PHI), CmpVal)  in emitAtomicCmpSwapW()
5296     .addReg(CmpVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0);  in emitAtomicCmpSwapW()