Lines Matching refs:f128
109 defm LoadStoreF128 : MVCLoadStore<load, f128, MVCSequence, 16>;
200 def : Pat<(f128 (uint_to_fp GR32:$src)), (CXLFBR 0, GR32:$src, 0)>;
204 def : Pat<(f128 (uint_to_fp GR64:$src)), (CXLGBR 0, GR64:$src, 0)>;
398 // f128 multiplication of two FP64 registers.
400 def : Pat<(fmul (f128 (fextend FP64:$src1)), (f128 (fextend FP64:$src2))),
401 (MXDBR (INSERT_SUBREG (f128 (IMPLICIT_DEF)),
404 // f128 multiplication of an FP64 register and an f64 memory.
406 def : Pat<(fmul (f128 (fextend FP64:$src1)),
407 (f128 (extloadf64 bdxaddr12only:$addr))),
408 (MXDB (INSERT_SUBREG (f128 (IMPLICIT_DEF)), FP64:$src1, subreg_h64),
452 def : Pat<(f128 fpimmneg0), (LCXBR (LZXR))>;