125   unsigned DestReg = MI->getOperand(0).getReg();  in expandRIEPseudo()  local
127   bool DestIsHigh = isHighReg(DestReg);  in expandRIEPseudo()
133                   DestReg, SrcReg, SystemZ::LR, 32,  in expandRIEPseudo()
136     MI->getOperand(1).setReg(DestReg);  in expandRIEPseudo()
170                                      DebugLoc DL, unsigned DestReg,  in emitGRX32Move()  argument
174   bool DestIsHigh = isHighReg(DestReg);  in emitGRX32Move()
183     BuildMI(MBB, MBBI, DL, get(LowLowOpcode), DestReg)  in emitGRX32Move()
188   BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)  in emitGRX32Move()
189     .addReg(DestReg, RegState::Undef)  in emitGRX32Move()
553                                    DebugLoc DL, unsigned DestReg,  in copyPhysReg()  argument
556   if (SystemZ::GR128BitRegClass.contains(DestReg, SrcReg)) {  in copyPhysReg()
557     copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_h64),  in copyPhysReg()
559     copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_l64),  in copyPhysReg()
564   if (SystemZ::GRX32BitRegClass.contains(DestReg, SrcReg)) {  in copyPhysReg()
565     emitGRX32Move(MBB, MBBI, DL, DestReg, SrcReg, SystemZ::LR, 32, KillSrc);  in copyPhysReg()
571   if (SystemZ::GR64BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
573   else if (SystemZ::FP32BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
575   else if (SystemZ::FP64BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
577   else if (SystemZ::FP128BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
579   else if (SystemZ::VR32BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
581   else if (SystemZ::VR64BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
583   else if (SystemZ::VR128BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
588   BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)  in copyPhysReg()
608     MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg,  in loadRegFromStackSlot()  argument
617   addFrameReference(BuildMI(MBB, MBBI, DL, get(LoadOpcode), DestReg),  in loadRegFromStackSlot()
692     unsigned DestReg = Dest.getReg();  in convertToThreeAddress()  local
698         TargetRegisterInfo::isVirtualRegister(DestReg) &&  in convertToThreeAddress()
700         MRI.getRegClass(DestReg)->contains(SystemZ::R1L) &&  in convertToThreeAddress()
702       MRI.constrainRegClass(DestReg, &SystemZ::GR32BitRegClass);  in convertToThreeAddress()