Lines Matching refs:IndexReg
257 AM.IndexReg = constrainOperandRegClass(MIB->getDesc(), AM.IndexReg, in addFullAddress()
596 (AM.Base.Reg == 0 && AM.IndexReg == 0)) { in handleConstantAddresses()
615 assert(AM.Base.Reg == 0 && AM.IndexReg == 0); in handleConstantAddresses()
677 if (AM.IndexReg == 0) { in handleConstantAddresses()
679 AM.IndexReg = getRegForValue(V); in handleConstantAddresses()
680 return AM.IndexReg != 0; in handleConstantAddresses()
764 unsigned IndexReg = AM.IndexReg; in X86SelectAddress() local
796 if (IndexReg == 0 && in X86SelectAddress()
801 IndexReg = getRegForGEPIndex(Op).first; in X86SelectAddress()
802 if (IndexReg == 0) in X86SelectAddress()
815 AM.IndexReg = IndexReg; in X86SelectAddress()
919 (AM.Base.Reg != 0 || AM.IndexReg != 0)) in X86SelectCallAddress()
939 assert(AM.Base.Reg == 0 && AM.IndexReg == 0); in X86SelectCallAddress()
956 if (AM.IndexReg == 0) { in X86SelectCallAddress()
958 AM.IndexReg = getRegForValue(V); in X86SelectCallAddress()
959 return AM.IndexReg != 0; in X86SelectCallAddress()
3447 AM.IndexReg == 0 && AM.Disp == 0 && AM.GV == nullptr) in X86MaterializeGV()
3587 if (!MO.isReg() || MO.isDef() || MO.getReg() != AM.IndexReg) in tryToFoldLoadIntoMI()
3590 unsigned IndexReg = constrainOperandRegClass(Result->getDesc(), in tryToFoldLoadIntoMI() local
3592 if (IndexReg == MO.getReg()) in tryToFoldLoadIntoMI()
3594 MO.setReg(IndexReg); in tryToFoldLoadIntoMI()