Lines Matching refs:ResultReg
88 unsigned &ResultReg, unsigned Alignment = 1);
97 unsigned &ResultReg);
348 MachineMemOperand *MMO, unsigned &ResultReg, in X86FastEmitLoad() argument
420 ResultReg = createResultReg(RC); in X86FastEmitLoad()
422 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in X86FastEmitLoad()
571 unsigned &ResultReg) { in X86FastEmitExtend() argument
577 ResultReg = RR; in X86FastEmitExtend()
1149 unsigned ResultReg = 0; in X86SelectLoad() local
1150 if (!X86FastEmitLoad(VT, AM, createMachineMemOperandFor(LI), ResultReg, in X86SelectLoad()
1154 updateValueMap(I, ResultReg); in X86SelectLoad()
1247 unsigned ResultReg = 0; in X86SelectCmp() local
1251 ResultReg = createResultReg(&X86::GR32RegClass); in X86SelectCmp()
1253 ResultReg); in X86SelectCmp()
1254 ResultReg = fastEmitInst_extractsubreg(MVT::i8, ResultReg, /*Kill=*/true, in X86SelectCmp()
1256 if (!ResultReg) in X86SelectCmp()
1261 ResultReg = createResultReg(&X86::GR8RegClass); in X86SelectCmp()
1263 ResultReg).addImm(1); in X86SelectCmp()
1268 if (ResultReg) { in X86SelectCmp()
1269 updateValueMap(I, ResultReg); in X86SelectCmp()
1297 ResultReg = createResultReg(&X86::GR8RegClass); in X86SelectCmp()
1309 ResultReg).addReg(FlagReg1).addReg(FlagReg2); in X86SelectCmp()
1310 updateValueMap(I, ResultReg); in X86SelectCmp()
1327 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in X86SelectCmp()
1328 updateValueMap(I, ResultReg); in X86SelectCmp()
1337 unsigned ResultReg = getRegForValue(I->getOperand(0)); in X86SelectZExt() local
1338 if (ResultReg == 0) in X86SelectZExt()
1345 ResultReg = fastEmitZExtFromI1(MVT::i8, ResultReg, /*TODO: Kill=*/false); in X86SelectZExt()
1348 if (ResultReg == 0) in X86SelectZExt()
1365 .addReg(ResultReg); in X86SelectZExt()
1367 ResultReg = createResultReg(&X86::GR64RegClass); in X86SelectZExt()
1369 ResultReg) in X86SelectZExt()
1372 ResultReg = fastEmit_r(MVT::i8, DstVT.getSimpleVT(), ISD::ZERO_EXTEND, in X86SelectZExt()
1373 ResultReg, /*Kill=*/true); in X86SelectZExt()
1374 if (ResultReg == 0) in X86SelectZExt()
1378 updateValueMap(I, ResultReg); in X86SelectZExt()
1590 unsigned ResultReg = createResultReg(RC); in X86SelectShift() local
1591 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(OpReg), ResultReg) in X86SelectShift()
1593 updateValueMap(I, ResultReg); in X86SelectShift()
1733 unsigned ResultReg = 0; in X86SelectDivRem() local
1747 ResultReg = fastEmitInst_extractsubreg(MVT::i8, ResultSuperReg, in X86SelectDivRem()
1751 if (!ResultReg) { in X86SelectDivRem()
1752 ResultReg = createResultReg(TypeEntry.RC); in X86SelectDivRem()
1753 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Copy), ResultReg) in X86SelectDivRem()
1756 updateValueMap(I, ResultReg); in X86SelectDivRem()
1872 unsigned ResultReg = fastEmitInst_rr(Opc, RC, RHSReg, RHSIsKill, in X86FastEmitCMoveSelect() local
1874 updateValueMap(I, ResultReg); in X86FastEmitCMoveSelect()
1950 unsigned ResultReg; in X86FastEmitSSESelect() local
1970 ResultReg = createResultReg(RC); in X86FastEmitSSESelect()
1972 TII.get(TargetOpcode::COPY), ResultReg).addReg(VBlendReg); in X86FastEmitSSESelect()
1980 ResultReg = fastEmitInst_rr(Opc[3], RC, AndNReg, /*IsKill=*/true, in X86FastEmitSSESelect()
1983 updateValueMap(I, ResultReg); in X86FastEmitSSESelect()
2045 unsigned ResultReg = in X86FastEmitPseudoSelect() local
2047 updateValueMap(I, ResultReg); in X86FastEmitPseudoSelect()
2072 unsigned ResultReg = createResultReg(RC); in X86SelectSelect() local
2074 TII.get(TargetOpcode::COPY), ResultReg) in X86SelectSelect()
2076 updateValueMap(I, ResultReg); in X86SelectSelect()
2129 unsigned ResultReg = in X86SelectSIToFP() local
2131 updateValueMap(I, ResultReg); in X86SelectSIToFP()
2147 unsigned ResultReg = createResultReg(RC); in X86SelectFPExtOrFPTrunc() local
2150 ResultReg); in X86SelectFPExtOrFPTrunc()
2154 updateValueMap(I, ResultReg); in X86SelectFPExtOrFPTrunc()
2215 unsigned ResultReg = fastEmitInst_extractsubreg(MVT::i8, in X86SelectTrunc() local
2218 if (!ResultReg) in X86SelectTrunc()
2221 updateValueMap(I, ResultReg); in X86SelectTrunc()
2288 unsigned ResultReg = 0; in fastLowerIntrinsicCall() local
2299 ResultReg = createResultReg(&X86::GR32RegClass); in fastLowerIntrinsicCall()
2301 TII.get(X86::VMOVPDI2DIrr), ResultReg) in fastLowerIntrinsicCall()
2306 ResultReg = fastEmitInst_extractsubreg(MVT::i16, ResultReg, true, RegIdx); in fastLowerIntrinsicCall()
2321 ResultReg = createResultReg(&X86::FR32RegClass); in fastLowerIntrinsicCall()
2323 TII.get(TargetOpcode::COPY), ResultReg) in fastLowerIntrinsicCall()
2327 updateValueMap(II, ResultReg); in fastLowerIntrinsicCall()
2504 unsigned ResultReg = createResultReg(RC); in fastLowerIntrinsicCall() local
2507 ResultReg); in fastLowerIntrinsicCall()
2514 updateValueMap(II, ResultReg); in fastLowerIntrinsicCall()
2575 unsigned ResultReg = 0; in fastLowerIntrinsicCall() local
2584 ResultReg = createResultReg(TLI.getRegClassFor(VT)); in fastLowerIntrinsicCall()
2587 TII.get(Opc[IsDec][VT.SimpleTy-MVT::i8]), ResultReg) in fastLowerIntrinsicCall()
2590 ResultReg = fastEmit_ri(VT, VT, BaseOpc, LHSReg, LHSIsKill, in fastLowerIntrinsicCall()
2596 if (!ResultReg) { in fastLowerIntrinsicCall()
2601 ResultReg = fastEmit_rr(VT, VT, BaseOpc, LHSReg, LHSIsKill, RHSReg, in fastLowerIntrinsicCall()
2607 if (BaseOpc == X86ISD::UMUL && !ResultReg) { in fastLowerIntrinsicCall()
2616 ResultReg = fastEmitInst_r(MULOpc[VT.SimpleTy-MVT::i8], in fastLowerIntrinsicCall()
2618 } else if (BaseOpc == X86ISD::SMUL && !ResultReg) { in fastLowerIntrinsicCall()
2627 ResultReg = fastEmitInst_r(MULOpc[0], TLI.getRegClassFor(VT), RHSReg, in fastLowerIntrinsicCall()
2630 ResultReg = fastEmitInst_rr(MULOpc[VT.SimpleTy-MVT::i8], in fastLowerIntrinsicCall()
2635 if (!ResultReg) in fastLowerIntrinsicCall()
2639 assert((ResultReg+1) == ResultReg2 && "Nonconsecutive result registers."); in fastLowerIntrinsicCall()
2643 updateValueMap(II, ResultReg, 2); in fastLowerIntrinsicCall()
2705 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in fastLowerIntrinsicCall() local
2706 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) in fastLowerIntrinsicCall()
2709 updateValueMap(II, ResultReg); in fastLowerIntrinsicCall()
2801 unsigned ResultReg = createResultReg(RC); in fastLowerArguments() local
2803 TII.get(TargetOpcode::COPY), ResultReg) in fastLowerArguments()
2805 updateValueMap(&Arg, ResultReg); in fastLowerArguments()
2901 unsigned ResultReg; in fastLowerCall() local
2906 ResultReg = getRegForValue(PrevVal); in fastLowerCall()
2908 if (!ResultReg) in fastLowerCall()
2914 ResultReg = in fastLowerCall()
2915 fastEmit_ri(VT, VT, ISD::AND, ResultReg, hasTrivialKill(PrevVal), 1); in fastLowerCall()
2919 ResultReg = getRegForValue(Val); in fastLowerCall()
2922 if (!ResultReg) in fastLowerCall()
2925 ArgRegs.push_back(ResultReg); in fastLowerCall()
3170 unsigned ResultReg = FuncInfo.CreateRegs(CLI.RetTy); in fastLowerCall() local
3174 unsigned CopyReg = ResultReg + i; in fastLowerCall()
3208 TII.get(Opc), ResultReg + i), FI); in fastLowerCall()
3212 CLI.ResultReg = ResultReg; in fastLowerCall()
3316 unsigned ResultReg = createResultReg(&X86::GR64RegClass); in X86MaterializeInt() local
3318 TII.get(TargetOpcode::SUBREG_TO_REG), ResultReg) in X86MaterializeInt()
3320 return ResultReg; in X86MaterializeInt()
3344 unsigned ResultReg = createResultReg(&X86::GR64RegClass); in X86MaterializeInt() local
3346 TII.get(TargetOpcode::SUBREG_TO_REG), ResultReg) in X86MaterializeInt()
3348 return ResultReg; in X86MaterializeInt()
3413 unsigned ResultReg = createResultReg(RC); in X86MaterializeFP() local
3421 TII.get(Opc), ResultReg); in X86MaterializeFP()
3427 return ResultReg; in X86MaterializeFP()
3431 TII.get(Opc), ResultReg), in X86MaterializeFP()
3433 return ResultReg; in X86MaterializeFP()
3450 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in X86MaterializeGV() local
3456 ResultReg) in X86MaterializeGV()
3464 TII.get(Opc), ResultReg), AM); in X86MaterializeGV()
3466 return ResultReg; in X86MaterializeGV()
3509 unsigned ResultReg = createResultReg(RC); in fastMaterializeAlloca() local
3511 TII.get(Opc), ResultReg), AM); in fastMaterializeAlloca()
3512 return ResultReg; in fastMaterializeAlloca()
3548 unsigned ResultReg = createResultReg(RC); in fastMaterializeFloatZero() local
3549 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in fastMaterializeFloatZero()
3550 return ResultReg; in fastMaterializeFloatZero()