Lines Matching refs:VSEXT
13317 DAG.getNode(X86ISD::VSEXT, DL, MVT::v16i32, In)); in LowerTRUNCATE()
15111 return DAG.getNode(X86ISD::VSEXT, dl, VT, In); in LowerSIGN_EXTEND_AVX512()
15119 if (In.getOpcode() == X86ISD::VSEXT || In.getOpcode() == X86ISD::VZEXT) in LowerSIGN_EXTEND_AVX512()
15121 return DAG.getNode(X86ISD::VSEXT, dl, VT, In); in LowerSIGN_EXTEND_AVX512()
15158 return DAG.getNode(X86ISD::VSEXT, dl, VT, In); in LowerSIGN_EXTEND_VECTOR_INREG()
15210 return DAG.getNode(X86ISD::VSEXT, dl, VT, In); in LowerSIGN_EXTEND()
15239 OpLo = DAG.getNode(X86ISD::VSEXT, dl, HalfVT, OpLo); in LowerSIGN_EXTEND()
15240 OpHi = DAG.getNode(X86ISD::VSEXT, dl, HalfVT, OpHi); in LowerSIGN_EXTEND()
15403 SDValue Sext = DAG.getNode(X86ISD::VSEXT, dl, RegVT, SlicedVec); in LowerExtendedLoad()
18025 ALo = DAG.getNode(X86ISD::VSEXT, dl, ExVT, A); in LowerMUL()
18026 BLo = DAG.getNode(X86ISD::VSEXT, dl, ExVT, B); in LowerMUL()
18045 AHi = DAG.getNode(X86ISD::VSEXT, dl, ExVT, AHi); in LowerMUL()
18046 BHi = DAG.getNode(X86ISD::VSEXT, dl, ExVT, BHi); in LowerMUL()
20497 case X86ISD::VSEXT: return "X86ISD::VSEXT"; in getTargetNodeName()
26029 SDValue NewVec = DAG.getNode(X86ISD::VSEXT, dl, VT, WideLd); in PerformMLOADCombine()