4605     return DAG.getNode(X86ISD::VSHLI, dl, OpVT, WideSubVec,  in Insert1BitVector()
4611     WideSubVec = DAG.getNode(X86ISD::VSHLI, dl, OpVT, WideSubVec,  in Insert1BitVector()
4621     Vec = DAG.getNode(X86ISD::VSHLI, dl, OpVT, Vec, ShiftBits);  in Insert1BitVector()
4629     WideSubVec = DAG.getNode(X86ISD::VSHLI, dl, OpVT, Vec,  in Insert1BitVector()
4632     Vec = DAG.getNode(X86ISD::VSHLI, dl, OpVT, Vec, ShiftBits);  in Insert1BitVector()
7452     unsigned OpCode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI)  in lowerVectorShuffleAsShift()
11574   Vec = DAG.getNode(X86ISD::VSHLI, dl, VecVT, Vec,  in ExtractBitFromMaskVector()
11717     EltInVec = DAG.getNode(X86ISD::VSHLI, dl, VecVT, EltInVec,  in InsertBitToMaskVector()
15989   assert((Opc == X86ISD::VSHLI || Opc == X86ISD::VSRLI || Opc == X86ISD::VSRAI)  in getTargetVShiftByConstNode()
16002     case X86ISD::VSHLI:  in getTargetVShiftByConstNode()
16063     case X86ISD::VSHLI: Opc = X86ISD::VSHL; break;  in getTargetVShiftNode()
18121     AhiBlo = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, VT, AhiBlo, 32, DAG);  in LowerMUL()
18125     AloBhi = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, VT, AloBhi, 32, DAG);  in LowerMUL()
18313   unsigned X86Opc = (Op.getOpcode() == ISD::SHL) ? X86ISD::VSHLI :  in LowerScalarImmediateShift()
18381           SDValue SHL = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, ShiftVT,  in LowerScalarImmediateShift()
18482   unsigned X86OpcI = (Op.getOpcode() == ISD::SHL) ? X86ISD::VSHLI :  in LowerScalarVariableShift()
20511   case X86ISD::VSHLI:              return "X86ISD::VSHLI";  in getTargetNodeName()
26611     Reg = getTargetVShiftNode(X86ISD::VSHLI, DL, MVT::v4i32, Reg, ShAmt, DAG);  in combineVectorTruncationWithPACKSS()