Lines Matching refs:VSRAI
15177 SignExt = DAG.getNode(X86ISD::VSRAI, dl, CurrVT, Curr, in LowerSIGN_EXTEND_VECTOR_INREG()
15185 SDValue Sign = DAG.getNode(X86ISD::VSRAI, dl, CurrVT, Curr, in LowerSIGN_EXTEND_VECTOR_INREG()
15983 if (Opc == X86ISD::VSRAI) in getTargetVShiftByConstNode()
15989 assert((Opc == X86ISD::VSHLI || Opc == X86ISD::VSRLI || Opc == X86ISD::VSRAI) in getTargetVShiftByConstNode()
16026 case X86ISD::VSRAI: in getTargetVShiftByConstNode()
16065 case X86ISD::VSRAI: Opc = X86ISD::VSRA; break; in getTargetVShiftNode()
18314 (Op.getOpcode() == ISD::SRL) ? X86ISD::VSRLI : X86ISD::VSRAI; in LowerScalarImmediateShift()
18324 getTargetVShiftByConstNode(X86ISD::VSRAI, dl, ExVT, Ex, 31, DAG); in LowerScalarImmediateShift()
18325 SDValue Lower = getTargetVShiftByConstNode(X86ISD::VSRAI, dl, ExVT, Ex, in LowerScalarImmediateShift()
18334 SDValue Upper = getTargetVShiftByConstNode(X86ISD::VSRAI, dl, ExVT, Ex, in LowerScalarImmediateShift()
18483 (Op.getOpcode() == ISD::SRL) ? X86ISD::VSRLI : X86ISD::VSRAI; in LowerScalarVariableShift()
20513 case X86ISD::VSRAI: return "X86ISD::VSRAI"; in getTargetNodeName()
25579 } else if (Mask.getOpcode() == X86ISD::VSRAI) { in PerformOrCombine()
26612 Reg = getTargetVShiftNode(X86ISD::VSRAI, DL, MVT::v4i32, Reg, ShAmt, DAG); in combineVectorTruncationWithPACKSS()