1612     for (auto VT : { MVT::v64i8, MVT::v32i16, MVT::v16i32 }) {  in X86TargetLowering()
1620     addRegisterClass(MVT::v64i8,  &X86::VR512RegClass);  in X86TargetLowering()
1626     setOperationAction(ISD::LOAD,               MVT::v64i8, Legal);  in X86TargetLowering()
1630     setOperationAction(ISD::ADD,                MVT::v64i8, Legal);  in X86TargetLowering()
1632     setOperationAction(ISD::SUB,                MVT::v64i8, Legal);  in X86TargetLowering()
1639     setOperationAction(ISD::CONCAT_VECTORS,     MVT::v64i8, Custom);  in X86TargetLowering()
1643     setOperationAction(ISD::INSERT_SUBVECTOR,   MVT::v64i8, Custom);  in X86TargetLowering()
1645     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v64i8, Custom);  in X86TargetLowering()
1653     setOperationAction(ISD::VECTOR_SHUFFLE,     MVT::v64i8, Custom);  in X86TargetLowering()
1654     setOperationAction(ISD::SIGN_EXTEND,        MVT::v64i8, Custom);  in X86TargetLowering()
1655     setOperationAction(ISD::ZERO_EXTEND,        MVT::v64i8, Custom);  in X86TargetLowering()
1659     setOperationAction(ISD::INSERT_VECTOR_ELT,  MVT::v64i8, Custom);  in X86TargetLowering()
1661     setOperationAction(ISD::VSELECT,            MVT::v64i8, Legal);  in X86TargetLowering()
1668     setOperationAction(ISD::SMAX,               MVT::v64i8, Legal);  in X86TargetLowering()
1670     setOperationAction(ISD::UMAX,               MVT::v64i8, Legal);  in X86TargetLowering()
1672     setOperationAction(ISD::SMIN,               MVT::v64i8, Legal);  in X86TargetLowering()
1674     setOperationAction(ISD::UMIN,               MVT::v64i8, Legal);  in X86TargetLowering()
1684       setOperationAction(ISD::CTLZ,            MVT::v64i8,  Custom);  in X86TargetLowering()
1686       setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::v64i8,  Custom);  in X86TargetLowering()
1689     for (auto VT : { MVT::v64i8, MVT::v32i16 }) {  in X86TargetLowering()
11117   assert(V1.getSimpleValueType() == MVT::v64i8 && "Bad operand type!");  in lowerV64I8VectorShuffle()
11118   assert(V2.getSimpleValueType() == MVT::v64i8 && "Bad operand type!");  in lowerV64I8VectorShuffle()
11125   return splitAndLowerVectorShuffle(DL, MVT::v64i8, V1, V2, Mask, DAG);  in lowerV64I8VectorShuffle()
11164   case MVT::v64i8:  in lower512BitVectorShuffle()
11209     ExtVT = MVT::v64i8;  in lower1BitVectorShuffle()