Lines Matching refs:FRC
113 RegisterClass FRC = !if (!eq (EltTypeName, "f32"), FR32X, FR64X);
1474 (outs _.KRC:$dst), (ins _.FRC:$src1, _.FRC:$src2, AVXCC:$cc),
1477 [(set _.KRC:$dst, (OpNode _.FRC:$src1,
1478 _.FRC:$src2,
1484 (ins _.FRC:$src1, _.ScalarMemOp:$src2, AVXCC:$cc),
1487 [(set _.KRC:$dst, (OpNode _.FRC:$src1,
2966 (ins _.RC:$src1, _.FRC:$src2),
2969 (scalar_to_vector _.FRC:$src2))))],
2972 def rm : AVX512PI<0x10, MRMSrcMem, (outs _.FRC:$dst), (ins _.ScalarMemOp:$src),
2974 [(set _.FRC:$dst, (_.ScalarLdFrag addr:$src))],
2978 def mr: AVX512PI<0x11, MRMDestMem, (outs), (ins _.ScalarMemOp:$dst, _.FRC:$src),
2980 [(store _.FRC:$src, addr:$dst)], _.ExeDomain, IIC_SSE_MOV_S_MR>,
2983 (ins _.ScalarMemOp:$dst, VK1WM:$mask, _.FRC:$src),
3649 def rr : I< opc, MRMSrcReg, (outs _.FRC:$dst),
3650 (ins _.FRC:$src1, _.FRC:$src2),
3652 [(set _.FRC:$dst, (OpNode _.FRC:$src1, _.FRC:$src2))],
3654 def rm : I< opc, MRMSrcMem, (outs _.FRC:$dst),
3655 (ins _.FRC:$src1, _.ScalarMemOp:$src2),
3657 [(set _.FRC:$dst, (OpNode _.FRC:$src1,
4674 def r : AVX512FMA3<opc, MRMSrcReg, (outs _.FRC:$dst),
4675 (ins _.FRC:$src1, _.FRC:$src2, _.FRC:$src3),
4680 def m : AVX512FMA3<opc, MRMSrcMem, (outs _.FRC:$dst),
4681 (ins _.FRC:$src1, _.FRC:$src2, _.ScalarMemOp:$src3),
4699 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2, _.FRC:$src1,
4700 _.FRC:$src3))),
4701 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2, _.FRC:$src1,
4711 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2, _.FRC:$src3,
4712 _.FRC:$src1))),
4713 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2,
4714 (_.ScalarLdFrag addr:$src3), _.FRC:$src1)))>;
4723 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src1, _.FRC:$src3,
4724 _.FRC:$src2))),
4725 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src1,
4726 (_.ScalarLdFrag addr:$src3), _.FRC:$src2)))>;
4754 def rr : SI<opc, MRMSrcReg, (outs DstVT.FRC:$dst),
4755 (ins DstVT.FRC:$src1, SrcRC:$src),
4759 def rm : SI<opc, MRMSrcMem, (outs DstVT.FRC:$dst),
4760 (ins DstVT.FRC:$src1, x86memop:$src),
4942 def rr : SI<opc, MRMSrcReg, (outs _DstRC.RC:$dst), (ins _SrcRC.FRC:$src),
4944 [(set _DstRC.RC:$dst, (OpNode _SrcRC.FRC:$src))]>, EVEX;
4945 def rb : SI<opc, MRMSrcReg, (outs _DstRC.RC:$dst), (ins _SrcRC.FRC:$src),
5916 def r : I<opc, MRMSrcReg, (outs _.FRC:$dst),
5917 (ins _.FRC:$src1, _.FRC:$src2),
5921 def m : I<opc, MRMSrcMem, (outs _.FRC:$dst),
5922 (ins _.FRC:$src1, _.ScalarMemOp:$src2),
5926 def : Pat<(_.EltVT (OpNode _.FRC:$src)),
5928 (_.EltVT (IMPLICIT_DEF)), _.FRC:$src)>;
5985 def : Pat<(ffloor _.FRC:$src), (COPY_TO_REGCLASS
5987 (_.VT (COPY_TO_REGCLASS _.FRC:$src, _.RC)), (i32 0x1))), _.FRC)>;
5988 def : Pat<(fceil _.FRC:$src), (COPY_TO_REGCLASS
5990 (_.VT (COPY_TO_REGCLASS _.FRC:$src, _.RC)), (i32 0x2))), _.FRC)>;
5991 def : Pat<(ftrunc _.FRC:$src), (COPY_TO_REGCLASS
5993 (_.VT (COPY_TO_REGCLASS _.FRC:$src, _.RC)), (i32 0x3))), _.FRC)>;
5994 def : Pat<(frint _.FRC:$src), (COPY_TO_REGCLASS
5996 (_.VT (COPY_TO_REGCLASS _.FRC:$src, _.RC)), (i32 0x4))), _.FRC)>;
5997 def : Pat<(fnearbyint _.FRC:$src), (COPY_TO_REGCLASS
5999 (_.VT (COPY_TO_REGCLASS _.FRC:$src, _.RC)), (i32 0xc))), _.FRC)>;
6003 addr:$src, (i32 0x1))), _.FRC)>;
6006 addr:$src, (i32 0x2))), _.FRC)>;
6009 addr:$src, (i32 0x3))), _.FRC)>;
6012 addr:$src, (i32 0x4))), _.FRC)>;
6015 addr:$src, (i32 0xc))), _.FRC)>;
6886 defm rmi_alt :AVX512_maskable_in_asm<opc, MRMSrcMem, _, (outs _.FRC:$dst),
6887 (ins _.FRC:$src1, _.ScalarMemOp:$src2, u8imm:$src3),