Lines Matching refs:saddlv
67 declare i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32>)
69 declare i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16>)
71 declare i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8>)
77 declare i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16>)
79 declare i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8>)
83 ; CHECK: saddlv h{{[0-9]+}}, {{v[0-9]+}}.8b
85 %saddlvv.i = tail call i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8> %a)
92 ; CHECK: saddlv s{{[0-9]+}}, {{v[0-9]+}}.4h
94 %saddlvv.i = tail call i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16> %a)
117 ; CHECK: saddlv h{{[0-9]+}}, {{v[0-9]+}}.16b
119 %saddlvv.i = tail call i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8> %a)
126 ; CHECK: saddlv s{{[0-9]+}}, {{v[0-9]+}}.8h
128 %saddlvv.i = tail call i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16> %a)
134 ; CHECK: saddlv d{{[0-9]+}}, {{v[0-9]+}}.4s
136 %saddlvv.i = tail call i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32> %a)