Lines Matching refs:i16
6 define <4 x i16> @vext_6701_0(<4 x i16> %a1, <4 x i16> %a2) {
10 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
11 ret <4 x i16> %x
14 define <4 x i16> @vext_6701_12(<4 x i16> %a1, <4 x i16> %a2) {
18 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
19 ret <4 x i16> %x
22 define <4 x i16> @vext_6701_13(<4 x i16> %a1, <4 x i16> %a2) {
26 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 7, i32 undef, i32 1>
27 ret <4 x i16> %x
30 define <4 x i16> @vext_6701_14(<4 x i16> %a1, <4 x i16> %a2) {
34 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 7, i32 0, i32 undef>
35 ret <4 x i16> %x
38 define <4 x i16> @vext_6701_23(<4 x i16> %a1, <4 x i16> %a2) {
42 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 6, i32 undef, i32 undef, i32 1>
43 ret <4 x i16> %x
46 define <4 x i16> @vext_6701_24(<4 x i16> %a1, <4 x i16> %a2) {
50 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 6, i32 undef, i32 0, i32 undef>
51 ret <4 x i16> %x
54 define <4 x i16> @vext_6701_34(<4 x i16> %a1, <4 x i16> %a2) {
58 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 6, i32 7, i32 undef, i32 undef>
59 ret <4 x i16> %x
62 define <4 x i16> @vext_5670_0(<4 x i16> %a1, <4 x i16> %a2) {
66 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
67 ret <4 x i16> %x
70 define <4 x i16> @vext_5670_12(<4 x i16> %a1, <4 x i16> %a2) {
74 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 undef, i32 7, i32 0>
75 ret <4 x i16> %x
78 define <4 x i16> @vext_5670_13(<4 x i16> %a1, <4 x i16> %a2) {
82 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 6, i32 undef, i32 0>
83 ret <4 x i16> %x
86 define <4 x i16> @vext_5670_14(<4 x i16> %a1, <4 x i16> %a2) {
90 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 6, i32 7, i32 undef>
91 ret <4 x i16> %x
94 define <4 x i16> @vext_5670_23(<4 x i16> %a1, <4 x i16> %a2) {
98 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 5, i32 undef, i32 undef, i32 0>
99 ret <4 x i16> %x
102 define <4 x i16> @vext_5670_24(<4 x i16> %a1, <4 x i16> %a2) {
106 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 5, i32 undef, i32 7, i32 undef>
107 ret <4 x i16> %x
110 define <4 x i16> @vext_5670_34(<4 x i16> %a1, <4 x i16> %a2) {
114 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 5, i32 6, i32 undef, i32 undef>
115 ret <4 x i16> %x
118 define <4 x i16> @vext_7012_0(<4 x i16> %a1, <4 x i16> %a2) {
122 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
123 ret <4 x i16> %x
126 define <4 x i16> @vext_7012_12(<4 x i16> %a1, <4 x i16> %a2) {
130 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 undef, i32 1, i32 2>
131 ret <4 x i16> %x
134 define <4 x i16> @vext_7012_13(<4 x i16> %a1, <4 x i16> %a2) {
138 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 0, i32 undef, i32 2>
139 ret <4 x i16> %x
142 define <4 x i16> @vext_7012_14(<4 x i16> %a1, <4 x i16> %a2) {
146 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 0, i32 1, i32 undef>
147 ret <4 x i16> %x
150 define <4 x i16> @vext_7012_23(<4 x i16> %a1, <4 x i16> %a2) {
154 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 7, i32 undef, i32 undef, i32 2>
155 ret <4 x i16> %x
158 define <4 x i16> @vext_7012_24(<4 x i16> %a1, <4 x i16> %a2) {
162 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 7, i32 undef, i32 1, i32 undef>
163 ret <4 x i16> %x
166 define <4 x i16> @vext_7012_34(<4 x i16> %a1, <4 x i16> %a2) {
170 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 7, i32 0, i32 undef, i32 undef>
171 ret <4 x i16> %x