Lines Matching refs:REG
12 ; CHECK: fctidz [[REG:[0-9]+]], 1
13 ; CHECK: stfd [[REG]],
18 ; CHECK-VSX: xscvdpsxds [[REG:[0-9]+]], 1
19 ; CHECK-VSX: stxsdx [[REG]],
29 ; CHECK: fctidz [[REG:[0-9]+]], 1
30 ; CHECK: stfd [[REG]],
35 ; CHECK-VSX: xscvdpsxds [[REG:[0-9]+]], 1
36 ; CHECK-VSX: stxsdx [[REG]],
46 ; CHECK: fctiduz [[REG:[0-9]+]], 1
47 ; CHECK: stfd [[REG]],
52 ; CHECK-VSX: xscvdpuxds [[REG:[0-9]+]], 1
53 ; CHECK-VSX: stxsdx [[REG]],
63 ; CHECK: fctiduz [[REG:[0-9]+]], 1
64 ; CHECK: stfd [[REG]],
69 ; CHECK-VSX: xscvdpuxds [[REG:[0-9]+]], 1
70 ; CHECK-VSX: stxsdx [[REG]],
80 ; CHECK: fctiwz [[REG:[0-9]+]], 1
81 ; CHECK: stfiwx [[REG]],
86 ; CHECK-VSX: xscvdpsxws [[REG:[0-9]+]], 1
87 ; CHECK-VSX: stfiwx [[REG]],
97 ; CHECK: fctiwz [[REG:[0-9]+]], 1
98 ; CHECK: stfiwx [[REG]],
103 ; CHECK-VSX: xscvdpsxws [[REG:[0-9]+]], 1
104 ; CHECK-VSX: stfiwx [[REG]],
114 ; CHECK: fctiwuz [[REG:[0-9]+]], 1
115 ; CHECK: stfiwx [[REG]],
120 ; CHECK-VSX: xscvdpuxws [[REG:[0-9]+]], 1
121 ; CHECK-VSX: stfiwx [[REG]],
131 ; CHECK: fctiwuz [[REG:[0-9]+]], 1
132 ; CHECK: stfiwx [[REG]],
137 ; CHECK-VSX: xscvdpuxws [[REG:[0-9]+]], 1
138 ; CHECK-VSX: stfiwx [[REG]],