Lines Matching refs:i16
8 define <8 x i16> @sse2_psrai_w_0(<8 x i16> %v) {
10 ; CHECK-NEXT: ret <8 x i16> %v
11 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %v, i32 0)
12 ret <8 x i16> %1
15 define <8 x i16> @sse2_psrai_w_15(<8 x i16> %v) {
17 ; CHECK-NEXT: %1 = ashr <8 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 …
18 ; CHECK-NEXT: ret <8 x i16> %1
19 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %v, i32 15)
20 ret <8 x i16> %1
23 define <8 x i16> @sse2_psrai_w_64(<8 x i16> %v) {
25 ; CHECK-NEXT: %1 = ashr <8 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 …
26 ; CHECK-NEXT: ret <8 x i16> %1
27 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %v, i32 64)
28 ret <8 x i16> %1
54 define <16 x i16> @avx2_psrai_w_0(<16 x i16> %v) {
56 ; CHECK-NEXT: ret <16 x i16> %v
57 %1 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %v, i32 0)
58 ret <16 x i16> %1
61 define <16 x i16> @avx2_psrai_w_15(<16 x i16> %v) {
63 …shr <16 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15…
64 ; CHECK-NEXT: ret <16 x i16> %1
65 %1 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %v, i32 15)
66 ret <16 x i16> %1
69 define <16 x i16> @avx2_psrai_w_64(<16 x i16> %v) {
71 …shr <16 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15…
72 ; CHECK-NEXT: ret <16 x i16> %1
73 %1 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %v, i32 64)
74 ret <16 x i16> %1
104 define <8 x i16> @sse2_psrli_w_0(<8 x i16> %v) {
106 ; CHECK-NEXT: ret <8 x i16> %v
107 %1 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %v, i32 0)
108 ret <8 x i16> %1
111 define <8 x i16> @sse2_psrli_w_15(<8 x i16> %v) {
113 ; CHECK-NEXT: %1 = lshr <8 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 …
114 ; CHECK-NEXT: ret <8 x i16> %1
115 %1 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %v, i32 15)
116 ret <8 x i16> %1
119 define <8 x i16> @sse2_psrli_w_64(<8 x i16> %v) {
121 ; CHECK-NEXT: ret <8 x i16> zeroinitializer
122 %1 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %v, i32 64)
123 ret <8 x i16> %1
170 define <16 x i16> @avx2_psrli_w_0(<16 x i16> %v) {
172 ; CHECK-NEXT: ret <16 x i16> %v
173 %1 = tail call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %v, i32 0)
174 ret <16 x i16> %1
177 define <16 x i16> @avx2_psrli_w_15(<16 x i16> %v) {
179 …shr <16 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15…
180 ; CHECK-NEXT: ret <16 x i16> %1
181 %1 = tail call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %v, i32 15)
182 ret <16 x i16> %1
185 define <16 x i16> @avx2_psrli_w_64(<16 x i16> %v) {
187 ; CHECK-NEXT: ret <16 x i16> zeroinitializer
188 %1 = tail call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %v, i32 64)
189 ret <16 x i16> %1
240 define <8 x i16> @sse2_pslli_w_0(<8 x i16> %v) {
242 ; CHECK-NEXT: ret <8 x i16> %v
243 %1 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %v, i32 0)
244 ret <8 x i16> %1
247 define <8 x i16> @sse2_pslli_w_15(<8 x i16> %v) {
249 ; CHECK-NEXT: %1 = shl <8 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 1…
250 ; CHECK-NEXT: ret <8 x i16> %1
251 %1 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %v, i32 15)
252 ret <8 x i16> %1
255 define <8 x i16> @sse2_pslli_w_64(<8 x i16> %v) {
257 ; CHECK-NEXT: ret <8 x i16> zeroinitializer
258 %1 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %v, i32 64)
259 ret <8 x i16> %1
306 define <16 x i16> @avx2_pslli_w_0(<16 x i16> %v) {
308 ; CHECK-NEXT: ret <16 x i16> %v
309 %1 = tail call <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16> %v, i32 0)
310 ret <16 x i16> %1
313 define <16 x i16> @avx2_pslli_w_15(<16 x i16> %v) {
315 …shl <16 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15…
316 ; CHECK-NEXT: ret <16 x i16> %1
317 %1 = tail call <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16> %v, i32 15)
318 ret <16 x i16> %1
321 define <16 x i16> @avx2_pslli_w_64(<16 x i16> %v) {
323 ; CHECK-NEXT: ret <16 x i16> zeroinitializer
324 %1 = tail call <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16> %v, i32 64)
325 ret <16 x i16> %1
376 define <8 x i16> @sse2_psra_w_0(<8 x i16> %v) {
378 ; CHECK-NEXT: ret <8 x i16> %v
379 %1 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %v, <8 x i16> zeroinitializer)
380 ret <8 x i16> %1
383 define <8 x i16> @sse2_psra_w_15(<8 x i16> %v) {
385 ; CHECK-NEXT: %1 = ashr <8 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 …
386 ; CHECK-NEXT: ret <8 x i16> %1
387 …1 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %v, <8 x i16> <i16 15, i16 0, i16 0, i16 0…
388 ret <8 x i16> %1
391 define <8 x i16> @sse2_psra_w_15_splat(<8 x i16> %v) {
393 ; CHECK-NEXT: %1 = ashr <8 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 …
394 ; CHECK-NEXT: ret <8 x i16> %1
395 …%1 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %v, <8 x i16> <i16 15, i16 15, i16 15, i1…
396 ret <8 x i16> %1
399 define <8 x i16> @sse2_psra_w_64(<8 x i16> %v) {
401 ; CHECK-NEXT: %1 = ashr <8 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 …
402 ; CHECK-NEXT: ret <8 x i16> %1
403 …1 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %v, <8 x i16> <i16 64, i16 0, i16 0, i16 0…
404 ret <8 x i16> %1
438 define <16 x i16> @avx2_psra_w_0(<16 x i16> %v) {
440 ; CHECK-NEXT: ret <16 x i16> %v
441 %1 = tail call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %v, <8 x i16> zeroinitializer)
442 ret <16 x i16> %1
445 define <16 x i16> @avx2_psra_w_15(<16 x i16> %v) {
447 …shr <16 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15…
448 ; CHECK-NEXT: ret <16 x i16> %1
449 … = tail call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %v, <8 x i16> <i16 15, i16 0, i16 0, i16 …
450 ret <16 x i16> %1
453 define <16 x i16> @avx2_psra_w_15_splat(<16 x i16> %v) {
455 …shr <16 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15…
456 ; CHECK-NEXT: ret <16 x i16> %1
457 …1 = tail call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %v, <8 x i16> <i16 15, i16 15, i16 15, i…
458 ret <16 x i16> %1
461 define <16 x i16> @avx2_psra_w_64(<16 x i16> %v) {
463 …shr <16 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15…
464 ; CHECK-NEXT: ret <16 x i16> %1
465 … = tail call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %v, <8 x i16> <i16 64, i16 0, i16 0, i16 …
466 ret <16 x i16> %1
504 define <8 x i16> @sse2_psrl_w_0(<8 x i16> %v) {
506 ; CHECK-NEXT: ret <8 x i16> %v
507 %1 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %v, <8 x i16> zeroinitializer)
508 ret <8 x i16> %1
511 define <8 x i16> @sse2_psrl_w_15(<8 x i16> %v) {
513 ; CHECK-NEXT: %1 = lshr <8 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 …
514 ; CHECK-NEXT: ret <8 x i16> %1
515 …1 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %v, <8 x i16> <i16 15, i16 0, i16 0, i16 0…
516 ret <8 x i16> %1
519 define <8 x i16> @sse2_psrl_w_15_splat(<8 x i16> %v) {
521 ; CHECK-NEXT: ret <8 x i16> zeroinitializer
522 …%1 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %v, <8 x i16> <i16 15, i16 15, i16 15, i1…
523 ret <8 x i16> %1
526 define <8 x i16> @sse2_psrl_w_64(<8 x i16> %v) {
528 ; CHECK-NEXT: ret <8 x i16> zeroinitializer
529 …1 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %v, <8 x i16> <i16 64, i16 0, i16 0, i16 0…
530 ret <8 x i16> %1
584 define <16 x i16> @avx2_psrl_w_0(<16 x i16> %v) {
586 ; CHECK-NEXT: ret <16 x i16> %v
587 %1 = tail call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %v, <8 x i16> zeroinitializer)
588 ret <16 x i16> %1
591 define <16 x i16> @avx2_psrl_w_15(<16 x i16> %v) {
593 …shr <16 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15…
594 ; CHECK-NEXT: ret <16 x i16> %1
595 … = tail call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %v, <8 x i16> <i16 15, i16 0, i16 0, i16 …
596 ret <16 x i16> %1
599 define <16 x i16> @avx2_psrl_w_15_splat(<16 x i16> %v) {
601 ; CHECK-NEXT: ret <16 x i16> zeroinitializer
602 …1 = tail call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %v, <8 x i16> <i16 15, i16 15, i16 15, i…
603 ret <16 x i16> %1
606 define <16 x i16> @avx2_psrl_w_64(<16 x i16> %v) {
608 ; CHECK-NEXT: ret <16 x i16> zeroinitializer
609 … = tail call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %v, <8 x i16> <i16 64, i16 0, i16 0, i16 …
610 ret <16 x i16> %1
668 define <8 x i16> @sse2_psll_w_0(<8 x i16> %v) {
670 ; CHECK-NEXT: ret <8 x i16> %v
671 %1 = tail call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> %v, <8 x i16> zeroinitializer)
672 ret <8 x i16> %1
675 define <8 x i16> @sse2_psll_w_15(<8 x i16> %v) {
677 ; CHECK-NEXT: %1 = shl <8 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 1…
678 ; CHECK-NEXT: ret <8 x i16> %1
679 …1 = tail call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> %v, <8 x i16> <i16 15, i16 0, i16 0, i16 0…
680 ret <8 x i16> %1
683 define <8 x i16> @sse2_psll_w_15_splat(<8 x i16> %v) {
685 ; CHECK-NEXT: ret <8 x i16> zeroinitializer
686 …%1 = tail call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> %v, <8 x i16> <i16 15, i16 15, i16 15, i1…
687 ret <8 x i16> %1
690 define <8 x i16> @sse2_psll_w_64(<8 x i16> %v) {
692 ; CHECK-NEXT: ret <8 x i16> zeroinitializer
693 …1 = tail call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> %v, <8 x i16> <i16 64, i16 0, i16 0, i16 0…
694 ret <8 x i16> %1
748 define <16 x i16> @avx2_psll_w_0(<16 x i16> %v) {
750 ; CHECK-NEXT: ret <16 x i16> %v
751 %1 = tail call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> %v, <8 x i16> zeroinitializer)
752 ret <16 x i16> %1
755 define <16 x i16> @avx2_psll_w_15(<16 x i16> %v) {
757 …shl <16 x i16> %v, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15…
758 ; CHECK-NEXT: ret <16 x i16> %1
759 … = tail call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> %v, <8 x i16> <i16 15, i16 0, i16 0, i16 …
760 ret <16 x i16> %1
763 define <16 x i16> @avx2_psll_w_15_splat(<16 x i16> %v) {
765 ; CHECK-NEXT: ret <16 x i16> zeroinitializer
766 …1 = tail call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> %v, <8 x i16> <i16 15, i16 15, i16 15, i…
767 ret <16 x i16> %1
770 define <16 x i16> @avx2_psll_w_64(<16 x i16> %v) {
772 ; CHECK-NEXT: ret <16 x i16> zeroinitializer
773 … = tail call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> %v, <8 x i16> <i16 64, i16 0, i16 0, i16 …
774 ret <16 x i16> %1
832 define <8 x i16> @sse2_psra_w_var(<8 x i16> %v, <8 x i16> %a) {
834 ; CHECK-NEXT: %1 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %v, <8 x i16> %a)
835 ; CHECK-NEXT: ret <8 x i16> %1
836 …%1 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i3…
837 %2 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %v, <8 x i16> %1)
838 ret <8 x i16> %2
841 define <8 x i16> @sse2_psra_w_var_bc(<8 x i16> %v, <2 x i64> %a) {
843 ; CHECK-NEXT: %1 = bitcast <2 x i64> %a to <8 x i16>
844 ; CHECK-NEXT: %2 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %v, <8 x i16> %1)
845 ; CHECK-NEXT: ret <8 x i16> %2
847 %2 = bitcast <2 x i64> %1 to <8 x i16>
848 %3 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %v, <8 x i16> %2)
849 ret <8 x i16> %3
861 define <4 x i32> @sse2_psra_d_var_bc(<4 x i32> %v, <8 x i16> %a) {
863 ; CHECK-NEXT: %1 = bitcast <8 x i16> %a to <4 x i32>
866 …%1 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i3…
867 %2 = bitcast <8 x i16> %1 to <4 x i32>
872 define <16 x i16> @avx2_psra_w_var(<16 x i16> %v, <8 x i16> %a) {
874 ; CHECK-NEXT: %1 = tail call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %v, <8 x i16> %a)
875 ; CHECK-NEXT: ret <16 x i16> %1
876 …%1 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i3…
877 %2 = tail call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %v, <8 x i16> %1)
878 ret <16 x i16> %2
890 define <8 x i16> @sse2_psrl_w_var(<8 x i16> %v, <8 x i16> %a) {
892 ; CHECK-NEXT: %1 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %v, <8 x i16> %a)
893 ; CHECK-NEXT: ret <8 x i16> %1
894 …%1 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i3…
895 %2 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %v, <8 x i16> %1)
896 ret <8 x i16> %2
917 define <16 x i16> @avx2_psrl_w_var(<16 x i16> %v, <8 x i16> %a) {
919 ; CHECK-NEXT: %1 = tail call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %v, <8 x i16> %a)
920 ; CHECK-NEXT: ret <16 x i16> %1
921 …%1 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i3…
922 %2 = tail call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %v, <8 x i16> %1)
923 ret <16 x i16> %2
926 define <16 x i16> @avx2_psrl_w_var_bc(<16 x i16> %v, <16 x i8> %a) {
928 ; CHECK-NEXT: %1 = bitcast <16 x i8> %a to <8 x i16>
929 ; CHECK-NEXT: %2 = tail call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %v, <8 x i16> %1)
930 ; CHECK-NEXT: ret <16 x i16> %2
932 %2 = bitcast <16 x i8> %1 to <8 x i16>
933 %3 = tail call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %v, <8 x i16> %2)
934 ret <16 x i16> %3
966 define <8 x i16> @sse2_psll_w_var(<8 x i16> %v, <8 x i16> %a) {
968 ; CHECK-NEXT: %1 = tail call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> %v, <8 x i16> %a)
969 ; CHECK-NEXT: ret <8 x i16> %1
970 …%1 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i3…
971 %2 = tail call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> %v, <8 x i16> %1)
972 ret <8 x i16> %2
993 define <16 x i16> @avx2_psll_w_var(<16 x i16> %v, <8 x i16> %a) {
995 ; CHECK-NEXT: %1 = tail call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> %v, <8 x i16> %a)
996 ; CHECK-NEXT: ret <16 x i16> %1
997 …%1 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i3…
998 %2 = tail call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> %v, <8 x i16> %1)
999 ret <16 x i16> %2
1024 define <8 x i16> @test_sse2_psra_w_0(<8 x i16> %A) {
1026 ; CHECK-NEXT: ret <8 x i16> %A
1027 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %A, i32 0)
1028 …%2 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %1, <8 x i16> <i16 0, i16 0, i16 0, i16 0…
1029 %3 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %2, i32 0)
1030 ret <8 x i16> %3
1033 define <8 x i16> @test_sse2_psra_w_8() {
1035 ; CHECK-NEXT: ret <8 x i16> <i16 -128, i16 64, i16 32, i16 16, i16 -128, i16 64, i16 32, i16 16>
1036 %1 = bitcast <2 x i64> <i64 1152956690052710400, i64 1152956690052710400> to <8 x i16>
1037 %2 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %1, i32 3)
1038 …%3 = tail call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %2, <8 x i16> <i16 3, i16 0, i16 0, i16 0…
1039 %4 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %3, i32 2)
1040 ret <8 x i16> %4
1062 define <16 x i16> @test_avx2_psra_w_0(<16 x i16> %A) {
1064 ; CHECK-NEXT: ret <16 x i16> %A
1065 %1 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %A, i32 0)
1066 …%2 = tail call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %1, <8 x i16> <i16 0, i16 0, i16 0, i16…
1067 %3 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %2, i32 0)
1068 ret <16 x i16> %3
1071 define <16 x i16> @test_avx2_psra_w_8(<16 x i16> %A) {
1073 …t <16 x i16> <i16 -128, i16 64, i16 32, i16 16, i16 -128, i16 64, i16 32, i16 16, i16 -128, i16 64…
1074 …052710400, i64 1152956690052710400, i64 1152956690052710400, i64 1152956690052710400> to <16 x i16>
1075 %2 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %1, i32 3)
1076 …%3 = tail call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %2, <8 x i16> <i16 3, i16 0, i16 0, i16…
1077 %4 = tail call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %3, i32 2)
1078 ret <16 x i16> %4
1105 %4 = bitcast <2 x i64> %3 to <8 x i16>
1106 …%5 = tail call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6…
1107 %6 = bitcast <8 x i16> %5 to <4 x i32>
1112 %11 = bitcast <2 x i64> %10 to <8 x i16>
1113 %12 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %11, i32 %S)
1114 %13 = bitcast <8 x i16> %12 to <4 x i32>
1128 %4 = bitcast <2 x i64> %3 to <8 x i16>
1129 …i16> @llvm.x86.avx2.psll.w(<16 x i16> <i16 1, i16 0, i16 0, i16 0, i16 2, i16 0, i16 0, i16 0, i16…
1130 %6 = bitcast <16 x i16> %5 to <8 x i32>
1135 %11 = bitcast <4 x i64> %10 to <16 x i16>
1136 %12 = tail call <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16> %11, i32 %S)
1137 %13 = bitcast <16 x i16> %12 to <8 x i32>
1151 %4 = bitcast <2 x i64> %3 to <8 x i16>
1152 …%5 = tail call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6…
1153 %6 = bitcast <8 x i16> %5 to <4 x i32>
1158 %11 = bitcast <2 x i64> %10 to <8 x i16>
1159 %12 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %11, i32 %S)
1160 %13 = bitcast <8 x i16> %12 to <4 x i32>
1174 %4 = bitcast <2 x i64> %3 to <8 x i16>
1175 …i16> @llvm.x86.avx2.psll.w(<16 x i16> <i16 1, i16 0, i16 0, i16 0, i16 2, i16 0, i16 0, i16 0, i16…
1176 %6 = bitcast <16 x i16> %5 to <8 x i32>
1181 %11 = bitcast <4 x i64> %10 to <16 x i16>
1182 %12 = tail call <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16> %11, i32 %S)
1183 %13 = bitcast <16 x i16> %12 to <8 x i32>
1196 %4 = bitcast <2 x i64> %3 to <8 x i16>
1197 …= tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> <i16 16, i16 32, i16 64, i16 128, i16 256, i…
1198 %6 = bitcast <8 x i16> %5 to <4 x i32>
1203 %11 = bitcast <2 x i64> %10 to <8 x i16>
1204 %12 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %11, i32 %S)
1205 %13 = bitcast <8 x i16> %12 to <4 x i32>
1219 %4 = bitcast <2 x i64> %3 to <8 x i16>
1220 …i16> @llvm.x86.avx2.psrl.w(<16 x i16> <i16 1024, i16 0, i16 0, i16 0, i16 2048, i16 0, i16 0, i16 …
1221 %6 = bitcast <16 x i16> %5 to <8 x i32>
1226 %11 = bitcast <4 x i64> %10 to <16 x i16>
1227 %12 = tail call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %11, i32 %S)
1228 %13 = bitcast <16 x i16> %12 to <8 x i32>
1242 %4 = bitcast <2 x i64> %3 to <8 x i16>
1243 … tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> <i16 32, i16 64, i16 128, i16 256, i16 512, i…
1244 %6 = bitcast <8 x i16> %5 to <4 x i32>
1249 %11 = bitcast <2 x i64> %10 to <8 x i16>
1250 %12 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %11, i32 %S)
1251 %13 = bitcast <8 x i16> %12 to <4 x i32>
1265 %4 = bitcast <2 x i64> %3 to <8 x i16>
1266 …i16> @llvm.x86.avx2.psrl.w(<16 x i16> <i16 1024, i16 0, i16 0, i16 0, i16 2048, i16 0, i16 0, i16 …
1267 %6 = bitcast <16 x i16> %5 to <8 x i32>
1272 %11 = bitcast <4 x i64> %10 to <16 x i16>
1273 %12 = tail call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %11, i32 %S)
1274 %13 = bitcast <16 x i16> %12 to <8 x i32>
1285 declare <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16>, i32) #1
1288 declare <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16>, <8 x i16>) #1
1291 declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32) #1
1294 declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) #1
1298 declare <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16>, i32) #1
1301 declare <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16>, <8 x i16>) #1
1304 declare <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16>, i32) #1
1307 declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) #1
1310 declare <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16>, i32) #1
1312 declare <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16>, <8 x i16>) #1
1314 declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) #1
1316 declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) #1